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Searched refs:SPORT2_MRCS1 (Results 1 – 4 of 4) sorted by relevance

/linux-2.6.39/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h757 #define SPORT2_MRCS1 0xFFC02554 /* SPORT2 Multi-Channel Receive Select Register 1 */ macro
DcdefBF538.h342 #define bfin_read_SPORT2_MRCS1() bfin_read32(SPORT2_MRCS1)
343 #define bfin_write_SPORT2_MRCS1(val) bfin_write32(SPORT2_MRCS1, val)
/linux-2.6.39/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h994 #define SPORT2_MRCS1 0xffc02554 /* SPORT2 Multi channel Receive Select Regis… macro
DcdefBF54x_base.h1705 #define bfin_read_SPORT2_MRCS1() bfin_read32(SPORT2_MRCS1)
1706 #define bfin_write_SPORT2_MRCS1(val) bfin_write32(SPORT2_MRCS1, val)