1 /* 2 * Copyright (c) 2010 Broadcom Corporation 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION 13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef _bcmsdpcm_h_ 18 #define _bcmsdpcm_h_ 19 20 /* 21 * Software allocation of To SB Mailbox resources 22 */ 23 24 /* intstatus bits */ 25 #define I_SMB_NAK I_SMB_SW0 /* To SB Mailbox Frame NAK */ 26 #define I_SMB_INT_ACK I_SMB_SW1 /* To SB Mailbox Host Interrupt ACK */ 27 #define I_SMB_USE_OOB I_SMB_SW2 /* To SB Mailbox Use OOB Wakeup */ 28 #define I_SMB_DEV_INT I_SMB_SW3 /* To SB Mailbox Miscellaneous Interrupt */ 29 30 #define I_TOSBMAIL (I_SMB_NAK | I_SMB_INT_ACK | I_SMB_USE_OOB | I_SMB_DEV_INT) 31 32 /* tosbmailbox bits corresponding to intstatus bits */ 33 #define SMB_NAK (1 << 0) /* To SB Mailbox Frame NAK */ 34 #define SMB_INT_ACK (1 << 1) /* To SB Mailbox Host Interrupt ACK */ 35 #define SMB_USE_OOB (1 << 2) /* To SB Mailbox Use OOB Wakeup */ 36 #define SMB_DEV_INT (1 << 3) /* To SB Mailbox Miscellaneous Interrupt */ 37 #define SMB_MASK 0x0000000f /* To SB Mailbox Mask */ 38 39 /* tosbmailboxdata */ 40 #define SMB_DATA_VERSION_MASK 0x00ff0000 /* host protocol version (sent with F2 enable) */ 41 #define SMB_DATA_VERSION_SHIFT 16 /* host protocol version (sent with F2 enable) */ 42 43 /* 44 * Software allocation of To Host Mailbox resources 45 */ 46 47 /* intstatus bits */ 48 #define I_HMB_FC_STATE I_HMB_SW0 /* To Host Mailbox Flow Control State */ 49 #define I_HMB_FC_CHANGE I_HMB_SW1 /* To Host Mailbox Flow Control State Changed */ 50 #define I_HMB_FRAME_IND I_HMB_SW2 /* To Host Mailbox Frame Indication */ 51 #define I_HMB_HOST_INT I_HMB_SW3 /* To Host Mailbox Miscellaneous Interrupt */ 52 53 #define I_TOHOSTMAIL (I_HMB_FC_CHANGE | I_HMB_FRAME_IND | I_HMB_HOST_INT) 54 55 /* tohostmailbox bits corresponding to intstatus bits */ 56 #define HMB_FC_ON (1 << 0) /* To Host Mailbox Flow Control State */ 57 #define HMB_FC_CHANGE (1 << 1) /* To Host Mailbox Flow Control State Changed */ 58 #define HMB_FRAME_IND (1 << 2) /* To Host Mailbox Frame Indication */ 59 #define HMB_HOST_INT (1 << 3) /* To Host Mailbox Miscellaneous Interrupt */ 60 #define HMB_MASK 0x0000000f /* To Host Mailbox Mask */ 61 62 /* tohostmailboxdata */ 63 #define HMB_DATA_NAKHANDLED 1 /* we're ready to retransmit NAK'd frame to host */ 64 #define HMB_DATA_DEVREADY 2 /* we're ready to to talk to host after enable */ 65 #define HMB_DATA_FC 4 /* per prio flowcontrol update flag to host */ 66 #define HMB_DATA_FWREADY 8 /* firmware is ready for protocol activity */ 67 68 #define HMB_DATA_FCDATA_MASK 0xff000000 /* per prio flowcontrol data */ 69 #define HMB_DATA_FCDATA_SHIFT 24 /* per prio flowcontrol data */ 70 71 #define HMB_DATA_VERSION_MASK 0x00ff0000 /* device protocol version (with devready) */ 72 #define HMB_DATA_VERSION_SHIFT 16 /* device protocol version (with devready) */ 73 74 /* 75 * Software-defined protocol header 76 */ 77 78 /* Current protocol version */ 79 #define SDPCM_PROT_VERSION 4 80 81 /* SW frame header */ 82 #define SDPCM_SEQUENCE_MASK 0x000000ff /* Sequence Number Mask */ 83 #define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff) /* p starts w/SW Header */ 84 85 #define SDPCM_CHANNEL_MASK 0x00000f00 /* Channel Number Mask */ 86 #define SDPCM_CHANNEL_SHIFT 8 /* Channel Number Shift */ 87 #define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f) /* p starts w/SW Header */ 88 89 #define SDPCM_FLAGS_MASK 0x0000f000 /* Mask of flag bits */ 90 #define SDPCM_FLAGS_SHIFT 12 /* Flag bits shift */ 91 #define SDPCM_PACKET_FLAGS(p) ((((u8 *)p)[1] & 0xf0) >> 4) /* p starts w/SW Header */ 92 93 /* Next Read Len: lookahead length of next frame, in 16-byte units (rounded up) */ 94 #define SDPCM_NEXTLEN_MASK 0x00ff0000 /* Next Read Len Mask */ 95 #define SDPCM_NEXTLEN_SHIFT 16 /* Next Read Len Shift */ 96 #define SDPCM_NEXTLEN_VALUE(p) ((((u8 *)p)[2] & 0xff) << 4) /* p starts w/SW Header */ 97 #define SDPCM_NEXTLEN_OFFSET 2 98 99 /* Data Offset from SOF (HW Tag, SW Tag, Pad) */ 100 #define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */ 101 #define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff) 102 #define SDPCM_DOFFSET_MASK 0xff000000 103 #define SDPCM_DOFFSET_SHIFT 24 104 105 #define SDPCM_FCMASK_OFFSET 4 /* Flow control */ 106 #define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff) 107 #define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */ 108 #define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff) 109 #define SDPCM_VERSION_OFFSET 6 /* Version # */ 110 #define SDPCM_VERSION_VALUE(p) (((u8 *)p)[SDPCM_VERSION_OFFSET] & 0xff) 111 #define SDPCM_UNUSED_OFFSET 7 /* Spare */ 112 #define SDPCM_UNUSED_VALUE(p) (((u8 *)p)[SDPCM_UNUSED_OFFSET] & 0xff) 113 114 #define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */ 115 116 /* logical channel numbers */ 117 #define SDPCM_CONTROL_CHANNEL 0 /* Control Request/Response Channel Id */ 118 #define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */ 119 #define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */ 120 #define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets (superframes) */ 121 #define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */ 122 #define SDPCM_MAX_CHANNEL 15 123 124 #define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for eight-bit frame seq number */ 125 126 #define SDPCM_FLAG_RESVD0 0x01 127 #define SDPCM_FLAG_RESVD1 0x02 128 #define SDPCM_FLAG_GSPI_TXENAB 0x04 129 #define SDPCM_FLAG_GLOMDESC 0x08 /* Superframe descriptor mask */ 130 131 /* For GLOM_CHANNEL frames, use a flag to indicate descriptor frame */ 132 #define SDPCM_GLOMDESC_FLAG (SDPCM_FLAG_GLOMDESC << SDPCM_FLAGS_SHIFT) 133 134 #define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80) 135 136 /* For TEST_CHANNEL packets, define another 4-byte header */ 137 #define SDPCM_TEST_HDRLEN 4 /* Generally: Cmd(1), Ext(1), Len(2); 138 * Semantics of Ext byte depend on command. 139 * Len is current or requested frame length, not 140 * including test header; sent little-endian. 141 */ 142 #define SDPCM_TEST_DISCARD 0x01 /* Receiver discards. Ext is a pattern id. */ 143 #define SDPCM_TEST_ECHOREQ 0x02 /* Echo request. Ext is a pattern id. */ 144 #define SDPCM_TEST_ECHORSP 0x03 /* Echo response. Ext is a pattern id. */ 145 #define SDPCM_TEST_BURST 0x04 /* Receiver to send a burst. Ext is a frame count */ 146 #define SDPCM_TEST_SEND 0x05 /* Receiver sets send mode. Ext is boolean on/off */ 147 148 /* Handy macro for filling in datagen packets with a pattern */ 149 #define SDPCM_TEST_FILL(byteno, id) ((u8)(id + byteno)) 150 151 /* 152 * Software counters (first part matches hardware counters) 153 */ 154 155 typedef volatile struct { 156 u32 cmd52rd; /* Cmd52RdCount, SDIO: cmd52 reads */ 157 u32 cmd52wr; /* Cmd52WrCount, SDIO: cmd52 writes */ 158 u32 cmd53rd; /* Cmd53RdCount, SDIO: cmd53 reads */ 159 u32 cmd53wr; /* Cmd53WrCount, SDIO: cmd53 writes */ 160 u32 abort; /* AbortCount, SDIO: aborts */ 161 u32 datacrcerror; /* DataCrcErrorCount, SDIO: frames w/CRC error */ 162 u32 rdoutofsync; /* RdOutOfSyncCount, SDIO/PCMCIA: Rd Frm out of sync */ 163 u32 wroutofsync; /* RdOutOfSyncCount, SDIO/PCMCIA: Wr Frm out of sync */ 164 u32 writebusy; /* WriteBusyCount, SDIO: device asserted "busy" */ 165 u32 readwait; /* ReadWaitCount, SDIO: no data ready for a read cmd */ 166 u32 readterm; /* ReadTermCount, SDIO: read frame termination cmds */ 167 u32 writeterm; /* WriteTermCount, SDIO: write frames termination cmds */ 168 u32 rxdescuflo; /* receive descriptor underflows */ 169 u32 rxfifooflo; /* receive fifo overflows */ 170 u32 txfifouflo; /* transmit fifo underflows */ 171 u32 runt; /* runt (too short) frames recv'd from bus */ 172 u32 badlen; /* frame's rxh len does not match its hw tag len */ 173 u32 badcksum; /* frame's hw tag chksum doesn't agree with len value */ 174 u32 seqbreak; /* break in sequence # space from one rx frame to the next */ 175 u32 rxfcrc; /* frame rx header indicates crc error */ 176 u32 rxfwoos; /* frame rx header indicates write out of sync */ 177 u32 rxfwft; /* frame rx header indicates write frame termination */ 178 u32 rxfabort; /* frame rx header indicates frame aborted */ 179 u32 woosint; /* write out of sync interrupt */ 180 u32 roosint; /* read out of sync interrupt */ 181 u32 rftermint; /* read frame terminate interrupt */ 182 u32 wftermint; /* write frame terminate interrupt */ 183 } sdpcmd_cnt_t; 184 185 /* 186 * Shared structure between dongle and the host. 187 * The structure contains pointers to trap or assert information. 188 */ 189 #define SDPCM_SHARED_VERSION 0x0001 190 #define SDPCM_SHARED_VERSION_MASK 0x00FF 191 #define SDPCM_SHARED_ASSERT_BUILT 0x0100 192 #define SDPCM_SHARED_ASSERT 0x0200 193 #define SDPCM_SHARED_TRAP 0x0400 194 195 typedef struct { 196 u32 flags; 197 u32 trap_addr; 198 u32 assert_exp_addr; 199 u32 assert_file_addr; 200 u32 assert_line; 201 u32 console_addr; /* Address of hndrte_cons_t */ 202 u32 msgtrace_addr; 203 } sdpcm_shared_t; 204 205 extern sdpcm_shared_t sdpcm_shared; 206 207 #endif /* _bcmsdpcm_h_ */ 208