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Searched refs:SIC_IMASK0 (Results 1 – 12 of 12) sorted by relevance

/linux-2.6.39/arch/blackfin/mach-bf561/include/mach/
Dblackfin.h32 #define bfin_read_SIC_IMASK(x) bfin_read32(__SIC_MUX(SIC_IMASK0, x))
33 #define bfin_write_SIC_IMASK(x, val) bfin_write32(__SIC_MUX(SIC_IMASK0, x), val)
DdefBF561.h33 #define SIC_IMASK0 0xFFC0010C /* SIC Interrupt Mask register 0 */ macro
DcdefBF561.h32 #define bfin_read_SIC_IMASK0() bfin_read32(SIC_IMASK0)
33 #define bfin_write_SIC_IMASK0(val) bfin_write32(SIC_IMASK0,val)
/linux-2.6.39/arch/blackfin/mach-common/
Ddpmc_modes.S283 #ifdef SIC_IMASK0
284 PM_SYS_PUSH(SIC_IMASK0)
774 #ifdef SIC_IMASK0
775 PM_SYS_POP(SIC_IMASK0)
/linux-2.6.39/arch/blackfin/mach-bf518/include/mach/
DcdefBF512.h31 #define bfin_read_SIC_IMASK0() bfin_read32(SIC_IMASK0)
32 #define bfin_write_SIC_IMASK0(val) bfin_write32(SIC_IMASK0, val)
33 #define bfin_read_SIC_IMASK(x) bfin_read32(SIC_IMASK0 + (x << 6))
34 #define bfin_write_SIC_IMASK(x, val) bfin_write32((SIC_IMASK0 + (x << 6)), val)
DdefBF512.h27 #define SIC_IMASK0 0xFFC0010C /* Interrupt Mask Register */ macro
/linux-2.6.39/arch/blackfin/mach-bf527/include/mach/
DcdefBF522.h31 #define bfin_read_SIC_IMASK0() bfin_read32(SIC_IMASK0)
32 #define bfin_write_SIC_IMASK0(val) bfin_write32(SIC_IMASK0, val)
33 #define bfin_read_SIC_IMASK(x) bfin_read32(SIC_IMASK0 + (x << 6))
34 #define bfin_write_SIC_IMASK(x, val) bfin_write32((SIC_IMASK0 + (x << 6)), val)
DdefBF522.h30 #define SIC_IMASK0 0xFFC0010C /* Interrupt Mask Register */ macro
/linux-2.6.39/arch/blackfin/mach-bf538/include/mach/
DcdefBF538.h28 #define bfin_read_SIC_IMASK0() bfin_read32(SIC_IMASK0)
29 #define bfin_write_SIC_IMASK0(val) bfin_write32(SIC_IMASK0, val)
32 #define bfin_read_SIC_IMASK(x) bfin_read32(SIC_IMASK0 + x * (SIC_IMASK1 - SIC_IMASK0))
33 #define bfin_write_SIC_IMASK(x, val) bfin_write32(SIC_IMASK0 + x * (SIC_IMASK1 - SIC_IMASK0), val)
DdefBF538.h27 #define SIC_IMASK0 0xFFC0010C /* Interrupt Mask Register */ macro
/linux-2.6.39/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h39 #define SIC_IMASK0 0xffc0010c /* System Interrupt Mask Register 0 */ macro
DcdefBF54x_base.h41 #define bfin_read_SIC_IMASK0() bfin_read32(SIC_IMASK0)
42 #define bfin_write_SIC_IMASK0(val) bfin_write32(SIC_IMASK0, val)
47 #define bfin_read_SIC_IMASK(x) bfin_read32(SIC_IMASK0 + (x << 2))
48 #define bfin_write_SIC_IMASK(x, val) bfin_write32((SIC_IMASK0 + (x << 2)), val)