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Searched refs:SAR (Results 1 – 21 of 21) sorted by relevance

/linux-2.6.39/drivers/dma/
Dtxx9dmac.h75 u64 SAR; /* Source Address Register */ member
85 u32 SAR; member
210 u64 SAR; member
216 u32 SAR; member
Dtxx9dmac.c306 channel64_readq(dc, SAR), in txx9dmac_dump_regs()
318 channel32_readl(dc, SAR), in txx9dmac_dump_regs()
332 channel_writeq(dc, SAR, 0); in txx9dmac_reset_chan()
336 channel_writel(dc, SAR, 0); in txx9dmac_reset_chan()
449 desc->hwdesc.SAR : desc->hwdesc32.SAR; in txx9dmac_descriptor_complete()
518 (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR); in txx9dmac_dump_desc()
523 (u64)desc->CHAR, desc->SAR, desc->DAR, desc->CNTR, in txx9dmac_dump_desc()
531 d->CHAR, d->SAR, d->DAR, d->CNTR); in txx9dmac_dump_desc()
536 d->CHAR, d->SAR, d->DAR, d->CNTR, in txx9dmac_dump_desc()
799 desc->hwdesc.SAR = src + offset; in txx9dmac_prep_dma_memcpy()
[all …]
Ddw_dmac_regs.h23 DW_REG(SAR); /* Source Address Register */
Dintel_mid_dma_regs.h55 #define SAR 0x00 /* Source Address Register*/ macro
Ddw_dmac.c178 channel_readl(dwc, SAR), in dwc_dostart()
390 return channel_readl(dwc, SAR); in dw_dma_get_src_addr()
435 channel_readl(dwc, SAR), in dwc_handle_cyclic()
1021 channel_readl(dwc, SAR), in dw_dma_cyclic_start()
Dshdma.c152 sh_dmae_writel(sh_chan, hw->sar, SAR); in dmae_set_reg()
880 u32 sar_buf = sh_dmae_readl(sh_chan, SAR); in dmae_do_tasklet()
Dintel_mid_dma.c259 iowrite32(first->sar, midc->ch_regs + SAR); in midc_dostart()
/linux-2.6.39/arch/xtensa/include/asm/
Dsystem.h170 "rsr a13," __stringify(SAR) "\n\t" in spill_registers()
176 "wsr a13," __stringify(SAR) "\n\t" in spill_registers()
Dregs.h33 #define SAR 3 macro
/linux-2.6.39/arch/sh/include/cpu-sh2/cpu/
Ddma.h15 #define SAR ((unsigned long[]){ 0xffffff80, 0xffffff90 }) macro
/linux-2.6.39/arch/xtensa/kernel/
Dcoprocessor.S234 rsr a3, SAR
256 ssl a3 # SAR: 32 - coprocessor_number
324 wsr a0, SAR
Dentry.S128 rsr a3, SAR
208 rsr a2, SAR # original WINDOWBASE
268 rsr a3, SAR
479 rsr a3, SAR
608 wsr a3, SAR
1132 rsr a0, SAR
1136 s32i a0, a2, PT_AREG5 # store SAR to PT_AREG5
1144 call0 _spill_registers # destroys a3, a4, and SAR
1151 wsr a3, SAR
1252 rsr a3, SAR # WB is still in SAR
[all …]
Dalign.S180 rsr a0, SAR
423 wsr a0, SAR
441 wsr a0, SAR
/linux-2.6.39/arch/sh/include/asm/
Ddma-register.h17 #define SAR 0x00 macro
/linux-2.6.39/include/linux/
Dsh_dma.h68 #define SAR 0x00 macro
/linux-2.6.39/arch/sh/drivers/dma/
Ddma-sh.c189 __raw_writel(chan->sar, (dma_base_addr[chan->chan]+SAR)); in sh_dmac_xfer_dma()
/linux-2.6.39/Documentation/parisc/
Dregisters14 CR11 as specified by ABI (SAR)
/linux-2.6.39/arch/arm/common/
Dpl330.c261 SAR = 0, enumerator
553 dst == SAR ? "SAR" : (dst == DAR ? "DAR" : "CCR"), val); in _emit_MOV()
1143 off += _emit_MOV(dry_run, &buf[off], SAR, x->src_addr); in _setup_xfer()
/linux-2.6.39/arch/x86/lib/
Dx86-opcode-map.txt757 7: SAR
/linux-2.6.39/drivers/tty/
Dsynclinkmp.c359 #define SAR 0x84 macro
/linux-2.6.39/
DCREDITS3629 D: Driver for Interphase ATM (i)Chip SAR adapter card family (x575, x525, x531).