Searched refs:S1DREG_GPIO_CTL0 (Results 1 – 3 of 3) sorted by relevance
30 #define S1DREG_GPIO_CTL0 0x0008 /* General IO Pins Control Register 0 */ macro
47 { S1DREG_GPIO_CTL0, 0x00 },
411 {S1DREG_GPIO_CTL0, 0x00}, /* General IO Pins Control Register*/