1 /*******************************************************************************
2 This is the driver for the ST MAC 10/100/1000 on-chip Ethernet controllers.
3 ST Ethernet IPs are built around a Synopsys IP Core.
4
5 Copyright (C) 2007-2009 STMicroelectronics Ltd
6
7 This program is free software; you can redistribute it and/or modify it
8 under the terms and conditions of the GNU General Public License,
9 version 2, as published by the Free Software Foundation.
10
11 This program is distributed in the hope it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc.,
18 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19
20 The full GNU General Public License is included in this distribution in
21 the file called "COPYING".
22
23 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
24
25 Documentation available at:
26 http://www.stlinux.com
27 Support available at:
28 https://bugzilla.stlinux.com/
29 *******************************************************************************/
30
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/kernel.h>
34 #include <linux/interrupt.h>
35 #include <linux/etherdevice.h>
36 #include <linux/platform_device.h>
37 #include <linux/ip.h>
38 #include <linux/tcp.h>
39 #include <linux/skbuff.h>
40 #include <linux/ethtool.h>
41 #include <linux/if_ether.h>
42 #include <linux/crc32.h>
43 #include <linux/mii.h>
44 #include <linux/phy.h>
45 #include <linux/if_vlan.h>
46 #include <linux/dma-mapping.h>
47 #include <linux/slab.h>
48 #include "stmmac.h"
49
50 #define STMMAC_RESOURCE_NAME "stmmaceth"
51 #define PHY_RESOURCE_NAME "stmmacphy"
52
53 #undef STMMAC_DEBUG
54 /*#define STMMAC_DEBUG*/
55 #ifdef STMMAC_DEBUG
56 #define DBG(nlevel, klevel, fmt, args...) \
57 ((void)(netif_msg_##nlevel(priv) && \
58 printk(KERN_##klevel fmt, ## args)))
59 #else
60 #define DBG(nlevel, klevel, fmt, args...) do { } while (0)
61 #endif
62
63 #undef STMMAC_RX_DEBUG
64 /*#define STMMAC_RX_DEBUG*/
65 #ifdef STMMAC_RX_DEBUG
66 #define RX_DBG(fmt, args...) printk(fmt, ## args)
67 #else
68 #define RX_DBG(fmt, args...) do { } while (0)
69 #endif
70
71 #undef STMMAC_XMIT_DEBUG
72 /*#define STMMAC_XMIT_DEBUG*/
73 #ifdef STMMAC_TX_DEBUG
74 #define TX_DBG(fmt, args...) printk(fmt, ## args)
75 #else
76 #define TX_DBG(fmt, args...) do { } while (0)
77 #endif
78
79 #define STMMAC_ALIGN(x) L1_CACHE_ALIGN(x)
80 #define JUMBO_LEN 9000
81
82 /* Module parameters */
83 #define TX_TIMEO 5000 /* default 5 seconds */
84 static int watchdog = TX_TIMEO;
85 module_param(watchdog, int, S_IRUGO | S_IWUSR);
86 MODULE_PARM_DESC(watchdog, "Transmit timeout in milliseconds");
87
88 static int debug = -1; /* -1: default, 0: no output, 16: all */
89 module_param(debug, int, S_IRUGO | S_IWUSR);
90 MODULE_PARM_DESC(debug, "Message Level (0: no output, 16: all)");
91
92 static int phyaddr = -1;
93 module_param(phyaddr, int, S_IRUGO);
94 MODULE_PARM_DESC(phyaddr, "Physical device address");
95
96 #define DMA_TX_SIZE 256
97 static int dma_txsize = DMA_TX_SIZE;
98 module_param(dma_txsize, int, S_IRUGO | S_IWUSR);
99 MODULE_PARM_DESC(dma_txsize, "Number of descriptors in the TX list");
100
101 #define DMA_RX_SIZE 256
102 static int dma_rxsize = DMA_RX_SIZE;
103 module_param(dma_rxsize, int, S_IRUGO | S_IWUSR);
104 MODULE_PARM_DESC(dma_rxsize, "Number of descriptors in the RX list");
105
106 static int flow_ctrl = FLOW_OFF;
107 module_param(flow_ctrl, int, S_IRUGO | S_IWUSR);
108 MODULE_PARM_DESC(flow_ctrl, "Flow control ability [on/off]");
109
110 static int pause = PAUSE_TIME;
111 module_param(pause, int, S_IRUGO | S_IWUSR);
112 MODULE_PARM_DESC(pause, "Flow Control Pause Time");
113
114 #define TC_DEFAULT 64
115 static int tc = TC_DEFAULT;
116 module_param(tc, int, S_IRUGO | S_IWUSR);
117 MODULE_PARM_DESC(tc, "DMA threshold control value");
118
119 #define RX_NO_COALESCE 1 /* Always interrupt on completion */
120 #define TX_NO_COALESCE -1 /* No moderation by default */
121
122 /* Pay attention to tune this parameter; take care of both
123 * hardware capability and network stabitily/performance impact.
124 * Many tests showed that ~4ms latency seems to be good enough. */
125 #ifdef CONFIG_STMMAC_TIMER
126 #define DEFAULT_PERIODIC_RATE 256
127 static int tmrate = DEFAULT_PERIODIC_RATE;
128 module_param(tmrate, int, S_IRUGO | S_IWUSR);
129 MODULE_PARM_DESC(tmrate, "External timer freq. (default: 256Hz)");
130 #endif
131
132 #define DMA_BUFFER_SIZE BUF_SIZE_2KiB
133 static int buf_sz = DMA_BUFFER_SIZE;
134 module_param(buf_sz, int, S_IRUGO | S_IWUSR);
135 MODULE_PARM_DESC(buf_sz, "DMA buffer size");
136
137 static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
138 NETIF_MSG_LINK | NETIF_MSG_IFUP |
139 NETIF_MSG_IFDOWN | NETIF_MSG_TIMER);
140
141 static irqreturn_t stmmac_interrupt(int irq, void *dev_id);
142 static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev);
143
144 /**
145 * stmmac_verify_args - verify the driver parameters.
146 * Description: it verifies if some wrong parameter is passed to the driver.
147 * Note that wrong parameters are replaced with the default values.
148 */
stmmac_verify_args(void)149 static void stmmac_verify_args(void)
150 {
151 if (unlikely(watchdog < 0))
152 watchdog = TX_TIMEO;
153 if (unlikely(dma_rxsize < 0))
154 dma_rxsize = DMA_RX_SIZE;
155 if (unlikely(dma_txsize < 0))
156 dma_txsize = DMA_TX_SIZE;
157 if (unlikely((buf_sz < DMA_BUFFER_SIZE) || (buf_sz > BUF_SIZE_16KiB)))
158 buf_sz = DMA_BUFFER_SIZE;
159 if (unlikely(flow_ctrl > 1))
160 flow_ctrl = FLOW_AUTO;
161 else if (likely(flow_ctrl < 0))
162 flow_ctrl = FLOW_OFF;
163 if (unlikely((pause < 0) || (pause > 0xffff)))
164 pause = PAUSE_TIME;
165 }
166
167 #if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG)
print_pkt(unsigned char * buf,int len)168 static void print_pkt(unsigned char *buf, int len)
169 {
170 int j;
171 pr_info("len = %d byte, buf addr: 0x%p", len, buf);
172 for (j = 0; j < len; j++) {
173 if ((j % 16) == 0)
174 pr_info("\n %03x:", j);
175 pr_info(" %02x", buf[j]);
176 }
177 pr_info("\n");
178 }
179 #endif
180
181 /* minimum number of free TX descriptors required to wake up TX process */
182 #define STMMAC_TX_THRESH(x) (x->dma_tx_size/4)
183
stmmac_tx_avail(struct stmmac_priv * priv)184 static inline u32 stmmac_tx_avail(struct stmmac_priv *priv)
185 {
186 return priv->dirty_tx + priv->dma_tx_size - priv->cur_tx - 1;
187 }
188
189 /* On some ST platforms, some HW system configuraton registers have to be
190 * set according to the link speed negotiated.
191 */
stmmac_hw_fix_mac_speed(struct stmmac_priv * priv)192 static inline void stmmac_hw_fix_mac_speed(struct stmmac_priv *priv)
193 {
194 struct phy_device *phydev = priv->phydev;
195
196 if (likely(priv->plat->fix_mac_speed))
197 priv->plat->fix_mac_speed(priv->plat->bsp_priv,
198 phydev->speed);
199 }
200
201 /**
202 * stmmac_adjust_link
203 * @dev: net device structure
204 * Description: it adjusts the link parameters.
205 */
stmmac_adjust_link(struct net_device * dev)206 static void stmmac_adjust_link(struct net_device *dev)
207 {
208 struct stmmac_priv *priv = netdev_priv(dev);
209 struct phy_device *phydev = priv->phydev;
210 unsigned long flags;
211 int new_state = 0;
212 unsigned int fc = priv->flow_ctrl, pause_time = priv->pause;
213
214 if (phydev == NULL)
215 return;
216
217 DBG(probe, DEBUG, "stmmac_adjust_link: called. address %d link %d\n",
218 phydev->addr, phydev->link);
219
220 spin_lock_irqsave(&priv->lock, flags);
221 if (phydev->link) {
222 u32 ctrl = readl(priv->ioaddr + MAC_CTRL_REG);
223
224 /* Now we make sure that we can be in full duplex mode.
225 * If not, we operate in half-duplex mode. */
226 if (phydev->duplex != priv->oldduplex) {
227 new_state = 1;
228 if (!(phydev->duplex))
229 ctrl &= ~priv->hw->link.duplex;
230 else
231 ctrl |= priv->hw->link.duplex;
232 priv->oldduplex = phydev->duplex;
233 }
234 /* Flow Control operation */
235 if (phydev->pause)
236 priv->hw->mac->flow_ctrl(priv->ioaddr, phydev->duplex,
237 fc, pause_time);
238
239 if (phydev->speed != priv->speed) {
240 new_state = 1;
241 switch (phydev->speed) {
242 case 1000:
243 if (likely(priv->plat->has_gmac))
244 ctrl &= ~priv->hw->link.port;
245 stmmac_hw_fix_mac_speed(priv);
246 break;
247 case 100:
248 case 10:
249 if (priv->plat->has_gmac) {
250 ctrl |= priv->hw->link.port;
251 if (phydev->speed == SPEED_100) {
252 ctrl |= priv->hw->link.speed;
253 } else {
254 ctrl &= ~(priv->hw->link.speed);
255 }
256 } else {
257 ctrl &= ~priv->hw->link.port;
258 }
259 stmmac_hw_fix_mac_speed(priv);
260 break;
261 default:
262 if (netif_msg_link(priv))
263 pr_warning("%s: Speed (%d) is not 10"
264 " or 100!\n", dev->name, phydev->speed);
265 break;
266 }
267
268 priv->speed = phydev->speed;
269 }
270
271 writel(ctrl, priv->ioaddr + MAC_CTRL_REG);
272
273 if (!priv->oldlink) {
274 new_state = 1;
275 priv->oldlink = 1;
276 }
277 } else if (priv->oldlink) {
278 new_state = 1;
279 priv->oldlink = 0;
280 priv->speed = 0;
281 priv->oldduplex = -1;
282 }
283
284 if (new_state && netif_msg_link(priv))
285 phy_print_status(phydev);
286
287 spin_unlock_irqrestore(&priv->lock, flags);
288
289 DBG(probe, DEBUG, "stmmac_adjust_link: exiting\n");
290 }
291
292 /**
293 * stmmac_init_phy - PHY initialization
294 * @dev: net device structure
295 * Description: it initializes the driver's PHY state, and attaches the PHY
296 * to the mac driver.
297 * Return value:
298 * 0 on success
299 */
stmmac_init_phy(struct net_device * dev)300 static int stmmac_init_phy(struct net_device *dev)
301 {
302 struct stmmac_priv *priv = netdev_priv(dev);
303 struct phy_device *phydev;
304 char phy_id[MII_BUS_ID_SIZE + 3];
305 char bus_id[MII_BUS_ID_SIZE];
306
307 priv->oldlink = 0;
308 priv->speed = 0;
309 priv->oldduplex = -1;
310
311 if (priv->phy_addr == -1) {
312 /* We don't have a PHY, so do nothing */
313 return 0;
314 }
315
316 snprintf(bus_id, MII_BUS_ID_SIZE, "%x", priv->plat->bus_id);
317 snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
318 priv->phy_addr);
319 pr_debug("stmmac_init_phy: trying to attach to %s\n", phy_id);
320
321 phydev = phy_connect(dev, phy_id, &stmmac_adjust_link, 0,
322 priv->phy_interface);
323
324 if (IS_ERR(phydev)) {
325 pr_err("%s: Could not attach to PHY\n", dev->name);
326 return PTR_ERR(phydev);
327 }
328
329 /*
330 * Broken HW is sometimes missing the pull-up resistor on the
331 * MDIO line, which results in reads to non-existent devices returning
332 * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
333 * device as well.
334 * Note: phydev->phy_id is the result of reading the UID PHY registers.
335 */
336 if (phydev->phy_id == 0) {
337 phy_disconnect(phydev);
338 return -ENODEV;
339 }
340 pr_debug("stmmac_init_phy: %s: attached to PHY (UID 0x%x)"
341 " Link = %d\n", dev->name, phydev->phy_id, phydev->link);
342
343 priv->phydev = phydev;
344
345 return 0;
346 }
347
stmmac_enable_mac(void __iomem * ioaddr)348 static inline void stmmac_enable_mac(void __iomem *ioaddr)
349 {
350 u32 value = readl(ioaddr + MAC_CTRL_REG);
351
352 value |= MAC_RNABLE_RX | MAC_ENABLE_TX;
353 writel(value, ioaddr + MAC_CTRL_REG);
354 }
355
stmmac_disable_mac(void __iomem * ioaddr)356 static inline void stmmac_disable_mac(void __iomem *ioaddr)
357 {
358 u32 value = readl(ioaddr + MAC_CTRL_REG);
359
360 value &= ~(MAC_ENABLE_TX | MAC_RNABLE_RX);
361 writel(value, ioaddr + MAC_CTRL_REG);
362 }
363
364 /**
365 * display_ring
366 * @p: pointer to the ring.
367 * @size: size of the ring.
368 * Description: display all the descriptors within the ring.
369 */
display_ring(struct dma_desc * p,int size)370 static void display_ring(struct dma_desc *p, int size)
371 {
372 struct tmp_s {
373 u64 a;
374 unsigned int b;
375 unsigned int c;
376 };
377 int i;
378 for (i = 0; i < size; i++) {
379 struct tmp_s *x = (struct tmp_s *)(p + i);
380 pr_info("\t%d [0x%x]: DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
381 i, (unsigned int)virt_to_phys(&p[i]),
382 (unsigned int)(x->a), (unsigned int)((x->a) >> 32),
383 x->b, x->c);
384 pr_info("\n");
385 }
386 }
387
388 /**
389 * init_dma_desc_rings - init the RX/TX descriptor rings
390 * @dev: net device structure
391 * Description: this function initializes the DMA RX/TX descriptors
392 * and allocates the socket buffers.
393 */
init_dma_desc_rings(struct net_device * dev)394 static void init_dma_desc_rings(struct net_device *dev)
395 {
396 int i;
397 struct stmmac_priv *priv = netdev_priv(dev);
398 struct sk_buff *skb;
399 unsigned int txsize = priv->dma_tx_size;
400 unsigned int rxsize = priv->dma_rx_size;
401 unsigned int bfsize = priv->dma_buf_sz;
402 int buff2_needed = 0, dis_ic = 0;
403
404 /* Set the Buffer size according to the MTU;
405 * indeed, in case of jumbo we need to bump-up the buffer sizes.
406 */
407 if (unlikely(dev->mtu >= BUF_SIZE_8KiB))
408 bfsize = BUF_SIZE_16KiB;
409 else if (unlikely(dev->mtu >= BUF_SIZE_4KiB))
410 bfsize = BUF_SIZE_8KiB;
411 else if (unlikely(dev->mtu >= BUF_SIZE_2KiB))
412 bfsize = BUF_SIZE_4KiB;
413 else if (unlikely(dev->mtu >= DMA_BUFFER_SIZE))
414 bfsize = BUF_SIZE_2KiB;
415 else
416 bfsize = DMA_BUFFER_SIZE;
417
418 #ifdef CONFIG_STMMAC_TIMER
419 /* Disable interrupts on completion for the reception if timer is on */
420 if (likely(priv->tm->enable))
421 dis_ic = 1;
422 #endif
423 /* If the MTU exceeds 8k so use the second buffer in the chain */
424 if (bfsize >= BUF_SIZE_8KiB)
425 buff2_needed = 1;
426
427 DBG(probe, INFO, "stmmac: txsize %d, rxsize %d, bfsize %d\n",
428 txsize, rxsize, bfsize);
429
430 priv->rx_skbuff_dma = kmalloc(rxsize * sizeof(dma_addr_t), GFP_KERNEL);
431 priv->rx_skbuff =
432 kmalloc(sizeof(struct sk_buff *) * rxsize, GFP_KERNEL);
433 priv->dma_rx =
434 (struct dma_desc *)dma_alloc_coherent(priv->device,
435 rxsize *
436 sizeof(struct dma_desc),
437 &priv->dma_rx_phy,
438 GFP_KERNEL);
439 priv->tx_skbuff = kmalloc(sizeof(struct sk_buff *) * txsize,
440 GFP_KERNEL);
441 priv->dma_tx =
442 (struct dma_desc *)dma_alloc_coherent(priv->device,
443 txsize *
444 sizeof(struct dma_desc),
445 &priv->dma_tx_phy,
446 GFP_KERNEL);
447
448 if ((priv->dma_rx == NULL) || (priv->dma_tx == NULL)) {
449 pr_err("%s:ERROR allocating the DMA Tx/Rx desc\n", __func__);
450 return;
451 }
452
453 DBG(probe, INFO, "stmmac (%s) DMA desc rings: virt addr (Rx %p, "
454 "Tx %p)\n\tDMA phy addr (Rx 0x%08x, Tx 0x%08x)\n",
455 dev->name, priv->dma_rx, priv->dma_tx,
456 (unsigned int)priv->dma_rx_phy, (unsigned int)priv->dma_tx_phy);
457
458 /* RX INITIALIZATION */
459 DBG(probe, INFO, "stmmac: SKB addresses:\n"
460 "skb\t\tskb data\tdma data\n");
461
462 for (i = 0; i < rxsize; i++) {
463 struct dma_desc *p = priv->dma_rx + i;
464
465 skb = netdev_alloc_skb_ip_align(dev, bfsize);
466 if (unlikely(skb == NULL)) {
467 pr_err("%s: Rx init fails; skb is NULL\n", __func__);
468 break;
469 }
470 priv->rx_skbuff[i] = skb;
471 priv->rx_skbuff_dma[i] = dma_map_single(priv->device, skb->data,
472 bfsize, DMA_FROM_DEVICE);
473
474 p->des2 = priv->rx_skbuff_dma[i];
475 if (unlikely(buff2_needed))
476 p->des3 = p->des2 + BUF_SIZE_8KiB;
477 DBG(probe, INFO, "[%p]\t[%p]\t[%x]\n", priv->rx_skbuff[i],
478 priv->rx_skbuff[i]->data, priv->rx_skbuff_dma[i]);
479 }
480 priv->cur_rx = 0;
481 priv->dirty_rx = (unsigned int)(i - rxsize);
482 priv->dma_buf_sz = bfsize;
483 buf_sz = bfsize;
484
485 /* TX INITIALIZATION */
486 for (i = 0; i < txsize; i++) {
487 priv->tx_skbuff[i] = NULL;
488 priv->dma_tx[i].des2 = 0;
489 }
490 priv->dirty_tx = 0;
491 priv->cur_tx = 0;
492
493 /* Clear the Rx/Tx descriptors */
494 priv->hw->desc->init_rx_desc(priv->dma_rx, rxsize, dis_ic);
495 priv->hw->desc->init_tx_desc(priv->dma_tx, txsize);
496
497 if (netif_msg_hw(priv)) {
498 pr_info("RX descriptor ring:\n");
499 display_ring(priv->dma_rx, rxsize);
500 pr_info("TX descriptor ring:\n");
501 display_ring(priv->dma_tx, txsize);
502 }
503 }
504
dma_free_rx_skbufs(struct stmmac_priv * priv)505 static void dma_free_rx_skbufs(struct stmmac_priv *priv)
506 {
507 int i;
508
509 for (i = 0; i < priv->dma_rx_size; i++) {
510 if (priv->rx_skbuff[i]) {
511 dma_unmap_single(priv->device, priv->rx_skbuff_dma[i],
512 priv->dma_buf_sz, DMA_FROM_DEVICE);
513 dev_kfree_skb_any(priv->rx_skbuff[i]);
514 }
515 priv->rx_skbuff[i] = NULL;
516 }
517 }
518
dma_free_tx_skbufs(struct stmmac_priv * priv)519 static void dma_free_tx_skbufs(struct stmmac_priv *priv)
520 {
521 int i;
522
523 for (i = 0; i < priv->dma_tx_size; i++) {
524 if (priv->tx_skbuff[i] != NULL) {
525 struct dma_desc *p = priv->dma_tx + i;
526 if (p->des2)
527 dma_unmap_single(priv->device, p->des2,
528 priv->hw->desc->get_tx_len(p),
529 DMA_TO_DEVICE);
530 dev_kfree_skb_any(priv->tx_skbuff[i]);
531 priv->tx_skbuff[i] = NULL;
532 }
533 }
534 }
535
free_dma_desc_resources(struct stmmac_priv * priv)536 static void free_dma_desc_resources(struct stmmac_priv *priv)
537 {
538 /* Release the DMA TX/RX socket buffers */
539 dma_free_rx_skbufs(priv);
540 dma_free_tx_skbufs(priv);
541
542 /* Free the region of consistent memory previously allocated for
543 * the DMA */
544 dma_free_coherent(priv->device,
545 priv->dma_tx_size * sizeof(struct dma_desc),
546 priv->dma_tx, priv->dma_tx_phy);
547 dma_free_coherent(priv->device,
548 priv->dma_rx_size * sizeof(struct dma_desc),
549 priv->dma_rx, priv->dma_rx_phy);
550 kfree(priv->rx_skbuff_dma);
551 kfree(priv->rx_skbuff);
552 kfree(priv->tx_skbuff);
553 }
554
555 /**
556 * stmmac_dma_operation_mode - HW DMA operation mode
557 * @priv : pointer to the private device structure.
558 * Description: it sets the DMA operation mode: tx/rx DMA thresholds
559 * or Store-And-Forward capability.
560 */
stmmac_dma_operation_mode(struct stmmac_priv * priv)561 static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
562 {
563 if (likely((priv->plat->tx_coe) && (!priv->no_csum_insertion))) {
564 /* In case of GMAC, SF mode has to be enabled
565 * to perform the TX COE. This depends on:
566 * 1) TX COE if actually supported
567 * 2) There is no bugged Jumbo frame support
568 * that needs to not insert csum in the TDES.
569 */
570 priv->hw->dma->dma_mode(priv->ioaddr,
571 SF_DMA_MODE, SF_DMA_MODE);
572 tc = SF_DMA_MODE;
573 } else
574 priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
575 }
576
577 /**
578 * stmmac_tx:
579 * @priv: private driver structure
580 * Description: it reclaims resources after transmission completes.
581 */
stmmac_tx(struct stmmac_priv * priv)582 static void stmmac_tx(struct stmmac_priv *priv)
583 {
584 unsigned int txsize = priv->dma_tx_size;
585
586 while (priv->dirty_tx != priv->cur_tx) {
587 int last;
588 unsigned int entry = priv->dirty_tx % txsize;
589 struct sk_buff *skb = priv->tx_skbuff[entry];
590 struct dma_desc *p = priv->dma_tx + entry;
591
592 /* Check if the descriptor is owned by the DMA. */
593 if (priv->hw->desc->get_tx_owner(p))
594 break;
595
596 /* Verify tx error by looking at the last segment */
597 last = priv->hw->desc->get_tx_ls(p);
598 if (likely(last)) {
599 int tx_error =
600 priv->hw->desc->tx_status(&priv->dev->stats,
601 &priv->xstats, p,
602 priv->ioaddr);
603 if (likely(tx_error == 0)) {
604 priv->dev->stats.tx_packets++;
605 priv->xstats.tx_pkt_n++;
606 } else
607 priv->dev->stats.tx_errors++;
608 }
609 TX_DBG("%s: curr %d, dirty %d\n", __func__,
610 priv->cur_tx, priv->dirty_tx);
611
612 if (likely(p->des2))
613 dma_unmap_single(priv->device, p->des2,
614 priv->hw->desc->get_tx_len(p),
615 DMA_TO_DEVICE);
616 if (unlikely(p->des3))
617 p->des3 = 0;
618
619 if (likely(skb != NULL)) {
620 /*
621 * If there's room in the queue (limit it to size)
622 * we add this skb back into the pool,
623 * if it's the right size.
624 */
625 if ((skb_queue_len(&priv->rx_recycle) <
626 priv->dma_rx_size) &&
627 skb_recycle_check(skb, priv->dma_buf_sz))
628 __skb_queue_head(&priv->rx_recycle, skb);
629 else
630 dev_kfree_skb(skb);
631
632 priv->tx_skbuff[entry] = NULL;
633 }
634
635 priv->hw->desc->release_tx_desc(p);
636
637 entry = (++priv->dirty_tx) % txsize;
638 }
639 if (unlikely(netif_queue_stopped(priv->dev) &&
640 stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv))) {
641 netif_tx_lock(priv->dev);
642 if (netif_queue_stopped(priv->dev) &&
643 stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv)) {
644 TX_DBG("%s: restart transmit\n", __func__);
645 netif_wake_queue(priv->dev);
646 }
647 netif_tx_unlock(priv->dev);
648 }
649 }
650
stmmac_enable_irq(struct stmmac_priv * priv)651 static inline void stmmac_enable_irq(struct stmmac_priv *priv)
652 {
653 #ifdef CONFIG_STMMAC_TIMER
654 if (likely(priv->tm->enable))
655 priv->tm->timer_start(tmrate);
656 else
657 #endif
658 priv->hw->dma->enable_dma_irq(priv->ioaddr);
659 }
660
stmmac_disable_irq(struct stmmac_priv * priv)661 static inline void stmmac_disable_irq(struct stmmac_priv *priv)
662 {
663 #ifdef CONFIG_STMMAC_TIMER
664 if (likely(priv->tm->enable))
665 priv->tm->timer_stop();
666 else
667 #endif
668 priv->hw->dma->disable_dma_irq(priv->ioaddr);
669 }
670
stmmac_has_work(struct stmmac_priv * priv)671 static int stmmac_has_work(struct stmmac_priv *priv)
672 {
673 unsigned int has_work = 0;
674 int rxret, tx_work = 0;
675
676 rxret = priv->hw->desc->get_rx_owner(priv->dma_rx +
677 (priv->cur_rx % priv->dma_rx_size));
678
679 if (priv->dirty_tx != priv->cur_tx)
680 tx_work = 1;
681
682 if (likely(!rxret || tx_work))
683 has_work = 1;
684
685 return has_work;
686 }
687
_stmmac_schedule(struct stmmac_priv * priv)688 static inline void _stmmac_schedule(struct stmmac_priv *priv)
689 {
690 if (likely(stmmac_has_work(priv))) {
691 stmmac_disable_irq(priv);
692 napi_schedule(&priv->napi);
693 }
694 }
695
696 #ifdef CONFIG_STMMAC_TIMER
stmmac_schedule(struct net_device * dev)697 void stmmac_schedule(struct net_device *dev)
698 {
699 struct stmmac_priv *priv = netdev_priv(dev);
700
701 priv->xstats.sched_timer_n++;
702
703 _stmmac_schedule(priv);
704 }
705
stmmac_no_timer_started(unsigned int x)706 static void stmmac_no_timer_started(unsigned int x)
707 {;
708 };
709
stmmac_no_timer_stopped(void)710 static void stmmac_no_timer_stopped(void)
711 {;
712 };
713 #endif
714
715 /**
716 * stmmac_tx_err:
717 * @priv: pointer to the private device structure
718 * Description: it cleans the descriptors and restarts the transmission
719 * in case of errors.
720 */
stmmac_tx_err(struct stmmac_priv * priv)721 static void stmmac_tx_err(struct stmmac_priv *priv)
722 {
723
724 netif_stop_queue(priv->dev);
725
726 priv->hw->dma->stop_tx(priv->ioaddr);
727 dma_free_tx_skbufs(priv);
728 priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
729 priv->dirty_tx = 0;
730 priv->cur_tx = 0;
731 priv->hw->dma->start_tx(priv->ioaddr);
732
733 priv->dev->stats.tx_errors++;
734 netif_wake_queue(priv->dev);
735 }
736
737
stmmac_dma_interrupt(struct stmmac_priv * priv)738 static void stmmac_dma_interrupt(struct stmmac_priv *priv)
739 {
740 int status;
741
742 status = priv->hw->dma->dma_interrupt(priv->ioaddr, &priv->xstats);
743 if (likely(status == handle_tx_rx))
744 _stmmac_schedule(priv);
745
746 else if (unlikely(status == tx_hard_error_bump_tc)) {
747 /* Try to bump up the dma threshold on this failure */
748 if (unlikely(tc != SF_DMA_MODE) && (tc <= 256)) {
749 tc += 64;
750 priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
751 priv->xstats.threshold = tc;
752 }
753 } else if (unlikely(status == tx_hard_error))
754 stmmac_tx_err(priv);
755 }
756
757 /**
758 * stmmac_open - open entry point of the driver
759 * @dev : pointer to the device structure.
760 * Description:
761 * This function is the open entry point of the driver.
762 * Return value:
763 * 0 on success and an appropriate (-)ve integer as defined in errno.h
764 * file on failure.
765 */
stmmac_open(struct net_device * dev)766 static int stmmac_open(struct net_device *dev)
767 {
768 struct stmmac_priv *priv = netdev_priv(dev);
769 int ret;
770
771 /* Check that the MAC address is valid. If its not, refuse
772 * to bring the device up. The user must specify an
773 * address using the following linux command:
774 * ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx */
775 if (!is_valid_ether_addr(dev->dev_addr)) {
776 random_ether_addr(dev->dev_addr);
777 pr_warning("%s: generated random MAC address %pM\n", dev->name,
778 dev->dev_addr);
779 }
780
781 stmmac_verify_args();
782
783 #ifdef CONFIG_STMMAC_TIMER
784 priv->tm = kzalloc(sizeof(struct stmmac_timer *), GFP_KERNEL);
785 if (unlikely(priv->tm == NULL)) {
786 pr_err("%s: ERROR: timer memory alloc failed\n", __func__);
787 return -ENOMEM;
788 }
789 priv->tm->freq = tmrate;
790
791 /* Test if the external timer can be actually used.
792 * In case of failure continue without timer. */
793 if (unlikely((stmmac_open_ext_timer(dev, priv->tm)) < 0)) {
794 pr_warning("stmmaceth: cannot attach the external timer.\n");
795 priv->tm->freq = 0;
796 priv->tm->timer_start = stmmac_no_timer_started;
797 priv->tm->timer_stop = stmmac_no_timer_stopped;
798 } else
799 priv->tm->enable = 1;
800 #endif
801 ret = stmmac_init_phy(dev);
802 if (unlikely(ret)) {
803 pr_err("%s: Cannot attach to PHY (error: %d)\n", __func__, ret);
804 goto open_error;
805 }
806
807 /* Create and initialize the TX/RX descriptors chains. */
808 priv->dma_tx_size = STMMAC_ALIGN(dma_txsize);
809 priv->dma_rx_size = STMMAC_ALIGN(dma_rxsize);
810 priv->dma_buf_sz = STMMAC_ALIGN(buf_sz);
811 init_dma_desc_rings(dev);
812
813 /* DMA initialization and SW reset */
814 ret = priv->hw->dma->init(priv->ioaddr, priv->plat->pbl,
815 priv->dma_tx_phy, priv->dma_rx_phy);
816 if (ret < 0) {
817 pr_err("%s: DMA initialization failed\n", __func__);
818 goto open_error;
819 }
820
821 /* Copy the MAC addr into the HW */
822 priv->hw->mac->set_umac_addr(priv->ioaddr, dev->dev_addr, 0);
823 /* If required, perform hw setup of the bus. */
824 if (priv->plat->bus_setup)
825 priv->plat->bus_setup(priv->ioaddr);
826 /* Initialize the MAC Core */
827 priv->hw->mac->core_init(priv->ioaddr);
828
829 priv->rx_coe = priv->hw->mac->rx_coe(priv->ioaddr);
830 if (priv->rx_coe)
831 pr_info("stmmac: Rx Checksum Offload Engine supported\n");
832 if (priv->plat->tx_coe)
833 pr_info("\tTX Checksum insertion supported\n");
834
835 /* Initialise the MMC (if present) to disable all interrupts. */
836 writel(0xffffffff, priv->ioaddr + MMC_HIGH_INTR_MASK);
837 writel(0xffffffff, priv->ioaddr + MMC_LOW_INTR_MASK);
838
839 /* Request the IRQ lines */
840 ret = request_irq(dev->irq, stmmac_interrupt,
841 IRQF_SHARED, dev->name, dev);
842 if (unlikely(ret < 0)) {
843 pr_err("%s: ERROR: allocating the IRQ %d (error: %d)\n",
844 __func__, dev->irq, ret);
845 goto open_error;
846 }
847
848 /* Enable the MAC Rx/Tx */
849 stmmac_enable_mac(priv->ioaddr);
850
851 /* Set the HW DMA mode and the COE */
852 stmmac_dma_operation_mode(priv);
853
854 /* Extra statistics */
855 memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats));
856 priv->xstats.threshold = tc;
857
858 /* Start the ball rolling... */
859 DBG(probe, DEBUG, "%s: DMA RX/TX processes started...\n", dev->name);
860 priv->hw->dma->start_tx(priv->ioaddr);
861 priv->hw->dma->start_rx(priv->ioaddr);
862
863 #ifdef CONFIG_STMMAC_TIMER
864 priv->tm->timer_start(tmrate);
865 #endif
866 /* Dump DMA/MAC registers */
867 if (netif_msg_hw(priv)) {
868 priv->hw->mac->dump_regs(priv->ioaddr);
869 priv->hw->dma->dump_regs(priv->ioaddr);
870 }
871
872 if (priv->phydev)
873 phy_start(priv->phydev);
874
875 napi_enable(&priv->napi);
876 skb_queue_head_init(&priv->rx_recycle);
877 netif_start_queue(dev);
878
879 return 0;
880
881 open_error:
882 #ifdef CONFIG_STMMAC_TIMER
883 kfree(priv->tm);
884 #endif
885 if (priv->phydev)
886 phy_disconnect(priv->phydev);
887
888 return ret;
889 }
890
891 /**
892 * stmmac_release - close entry point of the driver
893 * @dev : device pointer.
894 * Description:
895 * This is the stop entry point of the driver.
896 */
stmmac_release(struct net_device * dev)897 static int stmmac_release(struct net_device *dev)
898 {
899 struct stmmac_priv *priv = netdev_priv(dev);
900
901 /* Stop and disconnect the PHY */
902 if (priv->phydev) {
903 phy_stop(priv->phydev);
904 phy_disconnect(priv->phydev);
905 priv->phydev = NULL;
906 }
907
908 netif_stop_queue(dev);
909
910 #ifdef CONFIG_STMMAC_TIMER
911 /* Stop and release the timer */
912 stmmac_close_ext_timer();
913 if (priv->tm != NULL)
914 kfree(priv->tm);
915 #endif
916 napi_disable(&priv->napi);
917 skb_queue_purge(&priv->rx_recycle);
918
919 /* Free the IRQ lines */
920 free_irq(dev->irq, dev);
921
922 /* Stop TX/RX DMA and clear the descriptors */
923 priv->hw->dma->stop_tx(priv->ioaddr);
924 priv->hw->dma->stop_rx(priv->ioaddr);
925
926 /* Release and free the Rx/Tx resources */
927 free_dma_desc_resources(priv);
928
929 /* Disable the MAC Rx/Tx */
930 stmmac_disable_mac(priv->ioaddr);
931
932 netif_carrier_off(dev);
933
934 return 0;
935 }
936
937 /*
938 * To perform emulated hardware segmentation on skb.
939 */
stmmac_sw_tso(struct stmmac_priv * priv,struct sk_buff * skb)940 static int stmmac_sw_tso(struct stmmac_priv *priv, struct sk_buff *skb)
941 {
942 struct sk_buff *segs, *curr_skb;
943 int gso_segs = skb_shinfo(skb)->gso_segs;
944
945 /* Estimate the number of fragments in the worst case */
946 if (unlikely(stmmac_tx_avail(priv) < gso_segs)) {
947 netif_stop_queue(priv->dev);
948 TX_DBG(KERN_ERR "%s: TSO BUG! Tx Ring full when queue awake\n",
949 __func__);
950 if (stmmac_tx_avail(priv) < gso_segs)
951 return NETDEV_TX_BUSY;
952
953 netif_wake_queue(priv->dev);
954 }
955 TX_DBG("\tstmmac_sw_tso: segmenting: skb %p (len %d)\n",
956 skb, skb->len);
957
958 segs = skb_gso_segment(skb, priv->dev->features & ~NETIF_F_TSO);
959 if (IS_ERR(segs))
960 goto sw_tso_end;
961
962 do {
963 curr_skb = segs;
964 segs = segs->next;
965 TX_DBG("\t\tcurrent skb->len: %d, *curr %p,"
966 "*next %p\n", curr_skb->len, curr_skb, segs);
967 curr_skb->next = NULL;
968 stmmac_xmit(curr_skb, priv->dev);
969 } while (segs);
970
971 sw_tso_end:
972 dev_kfree_skb(skb);
973
974 return NETDEV_TX_OK;
975 }
976
stmmac_handle_jumbo_frames(struct sk_buff * skb,struct net_device * dev,int csum_insertion)977 static unsigned int stmmac_handle_jumbo_frames(struct sk_buff *skb,
978 struct net_device *dev,
979 int csum_insertion)
980 {
981 struct stmmac_priv *priv = netdev_priv(dev);
982 unsigned int nopaged_len = skb_headlen(skb);
983 unsigned int txsize = priv->dma_tx_size;
984 unsigned int entry = priv->cur_tx % txsize;
985 struct dma_desc *desc = priv->dma_tx + entry;
986
987 if (nopaged_len > BUF_SIZE_8KiB) {
988
989 int buf2_size = nopaged_len - BUF_SIZE_8KiB;
990
991 desc->des2 = dma_map_single(priv->device, skb->data,
992 BUF_SIZE_8KiB, DMA_TO_DEVICE);
993 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
994 priv->hw->desc->prepare_tx_desc(desc, 1, BUF_SIZE_8KiB,
995 csum_insertion);
996
997 entry = (++priv->cur_tx) % txsize;
998 desc = priv->dma_tx + entry;
999
1000 desc->des2 = dma_map_single(priv->device,
1001 skb->data + BUF_SIZE_8KiB,
1002 buf2_size, DMA_TO_DEVICE);
1003 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
1004 priv->hw->desc->prepare_tx_desc(desc, 0, buf2_size,
1005 csum_insertion);
1006 priv->hw->desc->set_tx_owner(desc);
1007 priv->tx_skbuff[entry] = NULL;
1008 } else {
1009 desc->des2 = dma_map_single(priv->device, skb->data,
1010 nopaged_len, DMA_TO_DEVICE);
1011 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
1012 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1013 csum_insertion);
1014 }
1015 return entry;
1016 }
1017
1018 /**
1019 * stmmac_xmit:
1020 * @skb : the socket buffer
1021 * @dev : device pointer
1022 * Description : Tx entry point of the driver.
1023 */
stmmac_xmit(struct sk_buff * skb,struct net_device * dev)1024 static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
1025 {
1026 struct stmmac_priv *priv = netdev_priv(dev);
1027 unsigned int txsize = priv->dma_tx_size;
1028 unsigned int entry;
1029 int i, csum_insertion = 0;
1030 int nfrags = skb_shinfo(skb)->nr_frags;
1031 struct dma_desc *desc, *first;
1032
1033 if (unlikely(stmmac_tx_avail(priv) < nfrags + 1)) {
1034 if (!netif_queue_stopped(dev)) {
1035 netif_stop_queue(dev);
1036 /* This is a hard error, log it. */
1037 pr_err("%s: BUG! Tx Ring full when queue awake\n",
1038 __func__);
1039 }
1040 return NETDEV_TX_BUSY;
1041 }
1042
1043 entry = priv->cur_tx % txsize;
1044
1045 #ifdef STMMAC_XMIT_DEBUG
1046 if ((skb->len > ETH_FRAME_LEN) || nfrags)
1047 pr_info("stmmac xmit:\n"
1048 "\tskb addr %p - len: %d - nopaged_len: %d\n"
1049 "\tn_frags: %d - ip_summed: %d - %s gso\n",
1050 skb, skb->len, skb_headlen(skb), nfrags, skb->ip_summed,
1051 !skb_is_gso(skb) ? "isn't" : "is");
1052 #endif
1053
1054 if (unlikely(skb_is_gso(skb)))
1055 return stmmac_sw_tso(priv, skb);
1056
1057 if (likely((skb->ip_summed == CHECKSUM_PARTIAL))) {
1058 if (unlikely((!priv->plat->tx_coe) ||
1059 (priv->no_csum_insertion)))
1060 skb_checksum_help(skb);
1061 else
1062 csum_insertion = 1;
1063 }
1064
1065 desc = priv->dma_tx + entry;
1066 first = desc;
1067
1068 #ifdef STMMAC_XMIT_DEBUG
1069 if ((nfrags > 0) || (skb->len > ETH_FRAME_LEN))
1070 pr_debug("stmmac xmit: skb len: %d, nopaged_len: %d,\n"
1071 "\t\tn_frags: %d, ip_summed: %d\n",
1072 skb->len, skb_headlen(skb), nfrags, skb->ip_summed);
1073 #endif
1074 priv->tx_skbuff[entry] = skb;
1075 if (unlikely(skb->len >= BUF_SIZE_4KiB)) {
1076 entry = stmmac_handle_jumbo_frames(skb, dev, csum_insertion);
1077 desc = priv->dma_tx + entry;
1078 } else {
1079 unsigned int nopaged_len = skb_headlen(skb);
1080 desc->des2 = dma_map_single(priv->device, skb->data,
1081 nopaged_len, DMA_TO_DEVICE);
1082 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1083 csum_insertion);
1084 }
1085
1086 for (i = 0; i < nfrags; i++) {
1087 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1088 int len = frag->size;
1089
1090 entry = (++priv->cur_tx) % txsize;
1091 desc = priv->dma_tx + entry;
1092
1093 TX_DBG("\t[entry %d] segment len: %d\n", entry, len);
1094 desc->des2 = dma_map_page(priv->device, frag->page,
1095 frag->page_offset,
1096 len, DMA_TO_DEVICE);
1097 priv->tx_skbuff[entry] = NULL;
1098 priv->hw->desc->prepare_tx_desc(desc, 0, len, csum_insertion);
1099 priv->hw->desc->set_tx_owner(desc);
1100 }
1101
1102 /* Interrupt on completition only for the latest segment */
1103 priv->hw->desc->close_tx_desc(desc);
1104
1105 #ifdef CONFIG_STMMAC_TIMER
1106 /* Clean IC while using timer */
1107 if (likely(priv->tm->enable))
1108 priv->hw->desc->clear_tx_ic(desc);
1109 #endif
1110 /* To avoid raise condition */
1111 priv->hw->desc->set_tx_owner(first);
1112
1113 priv->cur_tx++;
1114
1115 #ifdef STMMAC_XMIT_DEBUG
1116 if (netif_msg_pktdata(priv)) {
1117 pr_info("stmmac xmit: current=%d, dirty=%d, entry=%d, "
1118 "first=%p, nfrags=%d\n",
1119 (priv->cur_tx % txsize), (priv->dirty_tx % txsize),
1120 entry, first, nfrags);
1121 display_ring(priv->dma_tx, txsize);
1122 pr_info(">>> frame to be transmitted: ");
1123 print_pkt(skb->data, skb->len);
1124 }
1125 #endif
1126 if (unlikely(stmmac_tx_avail(priv) <= (MAX_SKB_FRAGS + 1))) {
1127 TX_DBG("%s: stop transmitted packets\n", __func__);
1128 netif_stop_queue(dev);
1129 }
1130
1131 dev->stats.tx_bytes += skb->len;
1132
1133 priv->hw->dma->enable_dma_transmission(priv->ioaddr);
1134
1135 return NETDEV_TX_OK;
1136 }
1137
stmmac_rx_refill(struct stmmac_priv * priv)1138 static inline void stmmac_rx_refill(struct stmmac_priv *priv)
1139 {
1140 unsigned int rxsize = priv->dma_rx_size;
1141 int bfsize = priv->dma_buf_sz;
1142 struct dma_desc *p = priv->dma_rx;
1143
1144 for (; priv->cur_rx - priv->dirty_rx > 0; priv->dirty_rx++) {
1145 unsigned int entry = priv->dirty_rx % rxsize;
1146 if (likely(priv->rx_skbuff[entry] == NULL)) {
1147 struct sk_buff *skb;
1148
1149 skb = __skb_dequeue(&priv->rx_recycle);
1150 if (skb == NULL)
1151 skb = netdev_alloc_skb_ip_align(priv->dev,
1152 bfsize);
1153
1154 if (unlikely(skb == NULL))
1155 break;
1156
1157 priv->rx_skbuff[entry] = skb;
1158 priv->rx_skbuff_dma[entry] =
1159 dma_map_single(priv->device, skb->data, bfsize,
1160 DMA_FROM_DEVICE);
1161
1162 (p + entry)->des2 = priv->rx_skbuff_dma[entry];
1163 if (unlikely(priv->plat->has_gmac)) {
1164 if (bfsize >= BUF_SIZE_8KiB)
1165 (p + entry)->des3 =
1166 (p + entry)->des2 + BUF_SIZE_8KiB;
1167 }
1168 RX_DBG(KERN_INFO "\trefill entry #%d\n", entry);
1169 }
1170 priv->hw->desc->set_rx_owner(p + entry);
1171 }
1172 }
1173
stmmac_rx(struct stmmac_priv * priv,int limit)1174 static int stmmac_rx(struct stmmac_priv *priv, int limit)
1175 {
1176 unsigned int rxsize = priv->dma_rx_size;
1177 unsigned int entry = priv->cur_rx % rxsize;
1178 unsigned int next_entry;
1179 unsigned int count = 0;
1180 struct dma_desc *p = priv->dma_rx + entry;
1181 struct dma_desc *p_next;
1182
1183 #ifdef STMMAC_RX_DEBUG
1184 if (netif_msg_hw(priv)) {
1185 pr_debug(">>> stmmac_rx: descriptor ring:\n");
1186 display_ring(priv->dma_rx, rxsize);
1187 }
1188 #endif
1189 count = 0;
1190 while (!priv->hw->desc->get_rx_owner(p)) {
1191 int status;
1192
1193 if (count >= limit)
1194 break;
1195
1196 count++;
1197
1198 next_entry = (++priv->cur_rx) % rxsize;
1199 p_next = priv->dma_rx + next_entry;
1200 prefetch(p_next);
1201
1202 /* read the status of the incoming frame */
1203 status = (priv->hw->desc->rx_status(&priv->dev->stats,
1204 &priv->xstats, p));
1205 if (unlikely(status == discard_frame))
1206 priv->dev->stats.rx_errors++;
1207 else {
1208 struct sk_buff *skb;
1209 int frame_len;
1210
1211 frame_len = priv->hw->desc->get_rx_frame_len(p);
1212 /* ACS is set; GMAC core strips PAD/FCS for IEEE 802.3
1213 * Type frames (LLC/LLC-SNAP) */
1214 if (unlikely(status != llc_snap))
1215 frame_len -= ETH_FCS_LEN;
1216 #ifdef STMMAC_RX_DEBUG
1217 if (frame_len > ETH_FRAME_LEN)
1218 pr_debug("\tRX frame size %d, COE status: %d\n",
1219 frame_len, status);
1220
1221 if (netif_msg_hw(priv))
1222 pr_debug("\tdesc: %p [entry %d] buff=0x%x\n",
1223 p, entry, p->des2);
1224 #endif
1225 skb = priv->rx_skbuff[entry];
1226 if (unlikely(!skb)) {
1227 pr_err("%s: Inconsistent Rx descriptor chain\n",
1228 priv->dev->name);
1229 priv->dev->stats.rx_dropped++;
1230 break;
1231 }
1232 prefetch(skb->data - NET_IP_ALIGN);
1233 priv->rx_skbuff[entry] = NULL;
1234
1235 skb_put(skb, frame_len);
1236 dma_unmap_single(priv->device,
1237 priv->rx_skbuff_dma[entry],
1238 priv->dma_buf_sz, DMA_FROM_DEVICE);
1239 #ifdef STMMAC_RX_DEBUG
1240 if (netif_msg_pktdata(priv)) {
1241 pr_info(" frame received (%dbytes)", frame_len);
1242 print_pkt(skb->data, frame_len);
1243 }
1244 #endif
1245 skb->protocol = eth_type_trans(skb, priv->dev);
1246
1247 if (unlikely(status == csum_none)) {
1248 /* always for the old mac 10/100 */
1249 skb_checksum_none_assert(skb);
1250 netif_receive_skb(skb);
1251 } else {
1252 skb->ip_summed = CHECKSUM_UNNECESSARY;
1253 napi_gro_receive(&priv->napi, skb);
1254 }
1255
1256 priv->dev->stats.rx_packets++;
1257 priv->dev->stats.rx_bytes += frame_len;
1258 }
1259 entry = next_entry;
1260 p = p_next; /* use prefetched values */
1261 }
1262
1263 stmmac_rx_refill(priv);
1264
1265 priv->xstats.rx_pkt_n += count;
1266
1267 return count;
1268 }
1269
1270 /**
1271 * stmmac_poll - stmmac poll method (NAPI)
1272 * @napi : pointer to the napi structure.
1273 * @budget : maximum number of packets that the current CPU can receive from
1274 * all interfaces.
1275 * Description :
1276 * This function implements the the reception process.
1277 * Also it runs the TX completion thread
1278 */
stmmac_poll(struct napi_struct * napi,int budget)1279 static int stmmac_poll(struct napi_struct *napi, int budget)
1280 {
1281 struct stmmac_priv *priv = container_of(napi, struct stmmac_priv, napi);
1282 int work_done = 0;
1283
1284 priv->xstats.poll_n++;
1285 stmmac_tx(priv);
1286 work_done = stmmac_rx(priv, budget);
1287
1288 if (work_done < budget) {
1289 napi_complete(napi);
1290 stmmac_enable_irq(priv);
1291 }
1292 return work_done;
1293 }
1294
1295 /**
1296 * stmmac_tx_timeout
1297 * @dev : Pointer to net device structure
1298 * Description: this function is called when a packet transmission fails to
1299 * complete within a reasonable tmrate. The driver will mark the error in the
1300 * netdev structure and arrange for the device to be reset to a sane state
1301 * in order to transmit a new packet.
1302 */
stmmac_tx_timeout(struct net_device * dev)1303 static void stmmac_tx_timeout(struct net_device *dev)
1304 {
1305 struct stmmac_priv *priv = netdev_priv(dev);
1306
1307 /* Clear Tx resources and restart transmitting again */
1308 stmmac_tx_err(priv);
1309 }
1310
1311 /* Configuration changes (passed on by ifconfig) */
stmmac_config(struct net_device * dev,struct ifmap * map)1312 static int stmmac_config(struct net_device *dev, struct ifmap *map)
1313 {
1314 if (dev->flags & IFF_UP) /* can't act on a running interface */
1315 return -EBUSY;
1316
1317 /* Don't allow changing the I/O address */
1318 if (map->base_addr != dev->base_addr) {
1319 pr_warning("%s: can't change I/O address\n", dev->name);
1320 return -EOPNOTSUPP;
1321 }
1322
1323 /* Don't allow changing the IRQ */
1324 if (map->irq != dev->irq) {
1325 pr_warning("%s: can't change IRQ number %d\n",
1326 dev->name, dev->irq);
1327 return -EOPNOTSUPP;
1328 }
1329
1330 /* ignore other fields */
1331 return 0;
1332 }
1333
1334 /**
1335 * stmmac_multicast_list - entry point for multicast addressing
1336 * @dev : pointer to the device structure
1337 * Description:
1338 * This function is a driver entry point which gets called by the kernel
1339 * whenever multicast addresses must be enabled/disabled.
1340 * Return value:
1341 * void.
1342 */
stmmac_multicast_list(struct net_device * dev)1343 static void stmmac_multicast_list(struct net_device *dev)
1344 {
1345 struct stmmac_priv *priv = netdev_priv(dev);
1346
1347 spin_lock(&priv->lock);
1348 priv->hw->mac->set_filter(dev);
1349 spin_unlock(&priv->lock);
1350 }
1351
1352 /**
1353 * stmmac_change_mtu - entry point to change MTU size for the device.
1354 * @dev : device pointer.
1355 * @new_mtu : the new MTU size for the device.
1356 * Description: the Maximum Transfer Unit (MTU) is used by the network layer
1357 * to drive packet transmission. Ethernet has an MTU of 1500 octets
1358 * (ETH_DATA_LEN). This value can be changed with ifconfig.
1359 * Return value:
1360 * 0 on success and an appropriate (-)ve integer as defined in errno.h
1361 * file on failure.
1362 */
stmmac_change_mtu(struct net_device * dev,int new_mtu)1363 static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
1364 {
1365 struct stmmac_priv *priv = netdev_priv(dev);
1366 int max_mtu;
1367
1368 if (netif_running(dev)) {
1369 pr_err("%s: must be stopped to change its MTU\n", dev->name);
1370 return -EBUSY;
1371 }
1372
1373 if (priv->plat->has_gmac)
1374 max_mtu = JUMBO_LEN;
1375 else
1376 max_mtu = ETH_DATA_LEN;
1377
1378 if ((new_mtu < 46) || (new_mtu > max_mtu)) {
1379 pr_err("%s: invalid MTU, max MTU is: %d\n", dev->name, max_mtu);
1380 return -EINVAL;
1381 }
1382
1383 /* Some GMAC devices have a bugged Jumbo frame support that
1384 * needs to have the Tx COE disabled for oversized frames
1385 * (due to limited buffer sizes). In this case we disable
1386 * the TX csum insertionin the TDES and not use SF. */
1387 if ((priv->plat->bugged_jumbo) && (priv->dev->mtu > ETH_DATA_LEN))
1388 priv->no_csum_insertion = 1;
1389 else
1390 priv->no_csum_insertion = 0;
1391
1392 dev->mtu = new_mtu;
1393
1394 return 0;
1395 }
1396
stmmac_interrupt(int irq,void * dev_id)1397 static irqreturn_t stmmac_interrupt(int irq, void *dev_id)
1398 {
1399 struct net_device *dev = (struct net_device *)dev_id;
1400 struct stmmac_priv *priv = netdev_priv(dev);
1401
1402 if (unlikely(!dev)) {
1403 pr_err("%s: invalid dev pointer\n", __func__);
1404 return IRQ_NONE;
1405 }
1406
1407 if (priv->plat->has_gmac)
1408 /* To handle GMAC own interrupts */
1409 priv->hw->mac->host_irq_status((void __iomem *) dev->base_addr);
1410
1411 stmmac_dma_interrupt(priv);
1412
1413 return IRQ_HANDLED;
1414 }
1415
1416 #ifdef CONFIG_NET_POLL_CONTROLLER
1417 /* Polling receive - used by NETCONSOLE and other diagnostic tools
1418 * to allow network I/O with interrupts disabled. */
stmmac_poll_controller(struct net_device * dev)1419 static void stmmac_poll_controller(struct net_device *dev)
1420 {
1421 disable_irq(dev->irq);
1422 stmmac_interrupt(dev->irq, dev);
1423 enable_irq(dev->irq);
1424 }
1425 #endif
1426
1427 /**
1428 * stmmac_ioctl - Entry point for the Ioctl
1429 * @dev: Device pointer.
1430 * @rq: An IOCTL specefic structure, that can contain a pointer to
1431 * a proprietary structure used to pass information to the driver.
1432 * @cmd: IOCTL command
1433 * Description:
1434 * Currently there are no special functionality supported in IOCTL, just the
1435 * phy_mii_ioctl(...) can be invoked.
1436 */
stmmac_ioctl(struct net_device * dev,struct ifreq * rq,int cmd)1437 static int stmmac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1438 {
1439 struct stmmac_priv *priv = netdev_priv(dev);
1440 int ret;
1441
1442 if (!netif_running(dev))
1443 return -EINVAL;
1444
1445 if (!priv->phydev)
1446 return -EINVAL;
1447
1448 spin_lock(&priv->lock);
1449 ret = phy_mii_ioctl(priv->phydev, rq, cmd);
1450 spin_unlock(&priv->lock);
1451
1452 return ret;
1453 }
1454
1455 #ifdef STMMAC_VLAN_TAG_USED
stmmac_vlan_rx_register(struct net_device * dev,struct vlan_group * grp)1456 static void stmmac_vlan_rx_register(struct net_device *dev,
1457 struct vlan_group *grp)
1458 {
1459 struct stmmac_priv *priv = netdev_priv(dev);
1460
1461 DBG(probe, INFO, "%s: Setting vlgrp to %p\n", dev->name, grp);
1462
1463 spin_lock(&priv->lock);
1464 priv->vlgrp = grp;
1465 spin_unlock(&priv->lock);
1466 }
1467 #endif
1468
1469 static const struct net_device_ops stmmac_netdev_ops = {
1470 .ndo_open = stmmac_open,
1471 .ndo_start_xmit = stmmac_xmit,
1472 .ndo_stop = stmmac_release,
1473 .ndo_change_mtu = stmmac_change_mtu,
1474 .ndo_set_multicast_list = stmmac_multicast_list,
1475 .ndo_tx_timeout = stmmac_tx_timeout,
1476 .ndo_do_ioctl = stmmac_ioctl,
1477 .ndo_set_config = stmmac_config,
1478 #ifdef STMMAC_VLAN_TAG_USED
1479 .ndo_vlan_rx_register = stmmac_vlan_rx_register,
1480 #endif
1481 #ifdef CONFIG_NET_POLL_CONTROLLER
1482 .ndo_poll_controller = stmmac_poll_controller,
1483 #endif
1484 .ndo_set_mac_address = eth_mac_addr,
1485 };
1486
1487 /**
1488 * stmmac_probe - Initialization of the adapter .
1489 * @dev : device pointer
1490 * Description: The function initializes the network device structure for
1491 * the STMMAC driver. It also calls the low level routines
1492 * in order to init the HW (i.e. the DMA engine)
1493 */
stmmac_probe(struct net_device * dev)1494 static int stmmac_probe(struct net_device *dev)
1495 {
1496 int ret = 0;
1497 struct stmmac_priv *priv = netdev_priv(dev);
1498
1499 ether_setup(dev);
1500
1501 dev->netdev_ops = &stmmac_netdev_ops;
1502 stmmac_set_ethtool_ops(dev);
1503
1504 dev->features |= NETIF_F_SG | NETIF_F_HIGHDMA |
1505 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1506 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1507 #ifdef STMMAC_VLAN_TAG_USED
1508 /* Both mac100 and gmac support receive VLAN tag detection */
1509 dev->features |= NETIF_F_HW_VLAN_RX;
1510 #endif
1511 priv->msg_enable = netif_msg_init(debug, default_msg_level);
1512
1513 if (flow_ctrl)
1514 priv->flow_ctrl = FLOW_AUTO; /* RX/TX pause on */
1515
1516 priv->pause = pause;
1517 netif_napi_add(dev, &priv->napi, stmmac_poll, 64);
1518
1519 /* Get the MAC address */
1520 priv->hw->mac->get_umac_addr((void __iomem *) dev->base_addr,
1521 dev->dev_addr, 0);
1522
1523 if (!is_valid_ether_addr(dev->dev_addr))
1524 pr_warning("\tno valid MAC address;"
1525 "please, use ifconfig or nwhwconfig!\n");
1526
1527 spin_lock_init(&priv->lock);
1528
1529 ret = register_netdev(dev);
1530 if (ret) {
1531 pr_err("%s: ERROR %i registering the device\n",
1532 __func__, ret);
1533 return -ENODEV;
1534 }
1535
1536 DBG(probe, DEBUG, "%s: Scatter/Gather: %s - HW checksums: %s\n",
1537 dev->name, (dev->features & NETIF_F_SG) ? "on" : "off",
1538 (dev->features & NETIF_F_IP_CSUM) ? "on" : "off");
1539
1540 return ret;
1541 }
1542
1543 /**
1544 * stmmac_mac_device_setup
1545 * @dev : device pointer
1546 * Description: select and initialise the mac device (mac100 or Gmac).
1547 */
stmmac_mac_device_setup(struct net_device * dev)1548 static int stmmac_mac_device_setup(struct net_device *dev)
1549 {
1550 struct stmmac_priv *priv = netdev_priv(dev);
1551
1552 struct mac_device_info *device;
1553
1554 if (priv->plat->has_gmac)
1555 device = dwmac1000_setup(priv->ioaddr);
1556 else
1557 device = dwmac100_setup(priv->ioaddr);
1558
1559 if (!device)
1560 return -ENOMEM;
1561
1562 if (priv->plat->enh_desc) {
1563 device->desc = &enh_desc_ops;
1564 pr_info("\tEnhanced descriptor structure\n");
1565 } else
1566 device->desc = &ndesc_ops;
1567
1568 priv->hw = device;
1569
1570 if (device_can_wakeup(priv->device)) {
1571 priv->wolopts = WAKE_MAGIC; /* Magic Frame as default */
1572 enable_irq_wake(dev->irq);
1573 }
1574
1575 return 0;
1576 }
1577
stmmacphy_dvr_probe(struct platform_device * pdev)1578 static int stmmacphy_dvr_probe(struct platform_device *pdev)
1579 {
1580 struct plat_stmmacphy_data *plat_dat = pdev->dev.platform_data;
1581
1582 pr_debug("stmmacphy_dvr_probe: added phy for bus %d\n",
1583 plat_dat->bus_id);
1584
1585 return 0;
1586 }
1587
stmmacphy_dvr_remove(struct platform_device * pdev)1588 static int stmmacphy_dvr_remove(struct platform_device *pdev)
1589 {
1590 return 0;
1591 }
1592
1593 static struct platform_driver stmmacphy_driver = {
1594 .driver = {
1595 .name = PHY_RESOURCE_NAME,
1596 },
1597 .probe = stmmacphy_dvr_probe,
1598 .remove = stmmacphy_dvr_remove,
1599 };
1600
1601 /**
1602 * stmmac_associate_phy
1603 * @dev: pointer to device structure
1604 * @data: points to the private structure.
1605 * Description: Scans through all the PHYs we have registered and checks if
1606 * any are associated with our MAC. If so, then just fill in
1607 * the blanks in our local context structure
1608 */
stmmac_associate_phy(struct device * dev,void * data)1609 static int stmmac_associate_phy(struct device *dev, void *data)
1610 {
1611 struct stmmac_priv *priv = (struct stmmac_priv *)data;
1612 struct plat_stmmacphy_data *plat_dat = dev->platform_data;
1613
1614 DBG(probe, DEBUG, "%s: checking phy for bus %d\n", __func__,
1615 plat_dat->bus_id);
1616
1617 /* Check that this phy is for the MAC being initialised */
1618 if (priv->plat->bus_id != plat_dat->bus_id)
1619 return 0;
1620
1621 /* OK, this PHY is connected to the MAC.
1622 Go ahead and get the parameters */
1623 DBG(probe, DEBUG, "%s: OK. Found PHY config\n", __func__);
1624 priv->phy_irq =
1625 platform_get_irq_byname(to_platform_device(dev), "phyirq");
1626 DBG(probe, DEBUG, "%s: PHY irq on bus %d is %d\n", __func__,
1627 plat_dat->bus_id, priv->phy_irq);
1628
1629 /* Override with kernel parameters if supplied XXX CRS XXX
1630 * this needs to have multiple instances */
1631 if ((phyaddr >= 0) && (phyaddr <= 31))
1632 plat_dat->phy_addr = phyaddr;
1633
1634 priv->phy_addr = plat_dat->phy_addr;
1635 priv->phy_mask = plat_dat->phy_mask;
1636 priv->phy_interface = plat_dat->interface;
1637 priv->phy_reset = plat_dat->phy_reset;
1638
1639 DBG(probe, DEBUG, "%s: exiting\n", __func__);
1640 return 1; /* forces exit of driver_for_each_device() */
1641 }
1642
1643 /**
1644 * stmmac_dvr_probe
1645 * @pdev: platform device pointer
1646 * Description: the driver is initialized through platform_device.
1647 */
stmmac_dvr_probe(struct platform_device * pdev)1648 static int stmmac_dvr_probe(struct platform_device *pdev)
1649 {
1650 int ret = 0;
1651 struct resource *res;
1652 void __iomem *addr = NULL;
1653 struct net_device *ndev = NULL;
1654 struct stmmac_priv *priv = NULL;
1655 struct plat_stmmacenet_data *plat_dat;
1656
1657 pr_info("STMMAC driver:\n\tplatform registration... ");
1658 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1659 if (!res)
1660 return -ENODEV;
1661 pr_info("\tdone!\n");
1662
1663 if (!request_mem_region(res->start, resource_size(res),
1664 pdev->name)) {
1665 pr_err("%s: ERROR: memory allocation failed"
1666 "cannot get the I/O addr 0x%x\n",
1667 __func__, (unsigned int)res->start);
1668 return -EBUSY;
1669 }
1670
1671 addr = ioremap(res->start, resource_size(res));
1672 if (!addr) {
1673 pr_err("%s: ERROR: memory mapping failed\n", __func__);
1674 ret = -ENOMEM;
1675 goto out_release_region;
1676 }
1677
1678 ndev = alloc_etherdev(sizeof(struct stmmac_priv));
1679 if (!ndev) {
1680 pr_err("%s: ERROR: allocating the device\n", __func__);
1681 ret = -ENOMEM;
1682 goto out_unmap;
1683 }
1684
1685 SET_NETDEV_DEV(ndev, &pdev->dev);
1686
1687 /* Get the MAC information */
1688 ndev->irq = platform_get_irq_byname(pdev, "macirq");
1689 if (ndev->irq == -ENXIO) {
1690 pr_err("%s: ERROR: MAC IRQ configuration "
1691 "information not found\n", __func__);
1692 ret = -ENXIO;
1693 goto out_free_ndev;
1694 }
1695
1696 priv = netdev_priv(ndev);
1697 priv->device = &(pdev->dev);
1698 priv->dev = ndev;
1699 plat_dat = pdev->dev.platform_data;
1700
1701 priv->plat = plat_dat;
1702
1703 priv->ioaddr = addr;
1704
1705 /* PMT module is not integrated in all the MAC devices. */
1706 if (plat_dat->pmt) {
1707 pr_info("\tPMT module supported\n");
1708 device_set_wakeup_capable(&pdev->dev, 1);
1709 }
1710
1711 platform_set_drvdata(pdev, ndev);
1712
1713 /* Set the I/O base addr */
1714 ndev->base_addr = (unsigned long)addr;
1715
1716 /* Custom initialisation */
1717 if (priv->plat->init) {
1718 ret = priv->plat->init(pdev);
1719 if (unlikely(ret))
1720 goto out_free_ndev;
1721 }
1722
1723 /* MAC HW revice detection */
1724 ret = stmmac_mac_device_setup(ndev);
1725 if (ret < 0)
1726 goto out_plat_exit;
1727
1728 /* Network Device Registration */
1729 ret = stmmac_probe(ndev);
1730 if (ret < 0)
1731 goto out_plat_exit;
1732
1733 /* associate a PHY - it is provided by another platform bus */
1734 if (!driver_for_each_device
1735 (&(stmmacphy_driver.driver), NULL, (void *)priv,
1736 stmmac_associate_phy)) {
1737 pr_err("No PHY device is associated with this MAC!\n");
1738 ret = -ENODEV;
1739 goto out_unregister;
1740 }
1741
1742 pr_info("\t%s - (dev. name: %s - id: %d, IRQ #%d\n"
1743 "\tIO base addr: 0x%p)\n", ndev->name, pdev->name,
1744 pdev->id, ndev->irq, addr);
1745
1746 /* MDIO bus Registration */
1747 pr_debug("\tMDIO bus (id: %d)...", priv->plat->bus_id);
1748 ret = stmmac_mdio_register(ndev);
1749 if (ret < 0)
1750 goto out_unregister;
1751 pr_debug("registered!\n");
1752 return 0;
1753
1754 out_unregister:
1755 unregister_netdev(ndev);
1756 out_plat_exit:
1757 if (priv->plat->exit)
1758 priv->plat->exit(pdev);
1759 out_free_ndev:
1760 free_netdev(ndev);
1761 platform_set_drvdata(pdev, NULL);
1762 out_unmap:
1763 iounmap(addr);
1764 out_release_region:
1765 release_mem_region(res->start, resource_size(res));
1766
1767 return ret;
1768 }
1769
1770 /**
1771 * stmmac_dvr_remove
1772 * @pdev: platform device pointer
1773 * Description: this function resets the TX/RX processes, disables the MAC RX/TX
1774 * changes the link status, releases the DMA descriptor rings,
1775 * unregisters the MDIO bus and unmaps the allocated memory.
1776 */
stmmac_dvr_remove(struct platform_device * pdev)1777 static int stmmac_dvr_remove(struct platform_device *pdev)
1778 {
1779 struct net_device *ndev = platform_get_drvdata(pdev);
1780 struct stmmac_priv *priv = netdev_priv(ndev);
1781 struct resource *res;
1782
1783 pr_info("%s:\n\tremoving driver", __func__);
1784
1785 priv->hw->dma->stop_rx(priv->ioaddr);
1786 priv->hw->dma->stop_tx(priv->ioaddr);
1787
1788 stmmac_disable_mac(priv->ioaddr);
1789
1790 netif_carrier_off(ndev);
1791
1792 stmmac_mdio_unregister(ndev);
1793
1794 if (priv->plat->exit)
1795 priv->plat->exit(pdev);
1796
1797 platform_set_drvdata(pdev, NULL);
1798 unregister_netdev(ndev);
1799
1800 iounmap((void *)priv->ioaddr);
1801 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1802 release_mem_region(res->start, resource_size(res));
1803
1804 free_netdev(ndev);
1805
1806 return 0;
1807 }
1808
1809 #ifdef CONFIG_PM
stmmac_suspend(struct device * dev)1810 static int stmmac_suspend(struct device *dev)
1811 {
1812 struct net_device *ndev = dev_get_drvdata(dev);
1813 struct stmmac_priv *priv = netdev_priv(ndev);
1814 int dis_ic = 0;
1815
1816 if (!ndev || !netif_running(ndev))
1817 return 0;
1818
1819 spin_lock(&priv->lock);
1820
1821 netif_device_detach(ndev);
1822 netif_stop_queue(ndev);
1823 if (priv->phydev)
1824 phy_stop(priv->phydev);
1825
1826 #ifdef CONFIG_STMMAC_TIMER
1827 priv->tm->timer_stop();
1828 if (likely(priv->tm->enable))
1829 dis_ic = 1;
1830 #endif
1831 napi_disable(&priv->napi);
1832
1833 /* Stop TX/RX DMA */
1834 priv->hw->dma->stop_tx(priv->ioaddr);
1835 priv->hw->dma->stop_rx(priv->ioaddr);
1836 /* Clear the Rx/Tx descriptors */
1837 priv->hw->desc->init_rx_desc(priv->dma_rx, priv->dma_rx_size,
1838 dis_ic);
1839 priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
1840
1841 /* Enable Power down mode by programming the PMT regs */
1842 if (device_may_wakeup(priv->device))
1843 priv->hw->mac->pmt(priv->ioaddr, priv->wolopts);
1844 else
1845 stmmac_disable_mac(priv->ioaddr);
1846
1847 spin_unlock(&priv->lock);
1848 return 0;
1849 }
1850
stmmac_resume(struct device * dev)1851 static int stmmac_resume(struct device *dev)
1852 {
1853 struct net_device *ndev = dev_get_drvdata(dev);
1854 struct stmmac_priv *priv = netdev_priv(ndev);
1855
1856 if (!netif_running(ndev))
1857 return 0;
1858
1859 spin_lock(&priv->lock);
1860
1861 /* Power Down bit, into the PM register, is cleared
1862 * automatically as soon as a magic packet or a Wake-up frame
1863 * is received. Anyway, it's better to manually clear
1864 * this bit because it can generate problems while resuming
1865 * from another devices (e.g. serial console). */
1866 if (device_may_wakeup(priv->device))
1867 priv->hw->mac->pmt(priv->ioaddr, 0);
1868
1869 netif_device_attach(ndev);
1870
1871 /* Enable the MAC and DMA */
1872 stmmac_enable_mac(priv->ioaddr);
1873 priv->hw->dma->start_tx(priv->ioaddr);
1874 priv->hw->dma->start_rx(priv->ioaddr);
1875
1876 #ifdef CONFIG_STMMAC_TIMER
1877 if (likely(priv->tm->enable))
1878 priv->tm->timer_start(tmrate);
1879 #endif
1880 napi_enable(&priv->napi);
1881
1882 if (priv->phydev)
1883 phy_start(priv->phydev);
1884
1885 netif_start_queue(ndev);
1886
1887 spin_unlock(&priv->lock);
1888 return 0;
1889 }
1890
stmmac_freeze(struct device * dev)1891 static int stmmac_freeze(struct device *dev)
1892 {
1893 struct net_device *ndev = dev_get_drvdata(dev);
1894
1895 if (!ndev || !netif_running(ndev))
1896 return 0;
1897
1898 return stmmac_release(ndev);
1899 }
1900
stmmac_restore(struct device * dev)1901 static int stmmac_restore(struct device *dev)
1902 {
1903 struct net_device *ndev = dev_get_drvdata(dev);
1904
1905 if (!ndev || !netif_running(ndev))
1906 return 0;
1907
1908 return stmmac_open(ndev);
1909 }
1910
1911 static const struct dev_pm_ops stmmac_pm_ops = {
1912 .suspend = stmmac_suspend,
1913 .resume = stmmac_resume,
1914 .freeze = stmmac_freeze,
1915 .thaw = stmmac_restore,
1916 .restore = stmmac_restore,
1917 };
1918 #else
1919 static const struct dev_pm_ops stmmac_pm_ops;
1920 #endif /* CONFIG_PM */
1921
1922 static struct platform_driver stmmac_driver = {
1923 .probe = stmmac_dvr_probe,
1924 .remove = stmmac_dvr_remove,
1925 .driver = {
1926 .name = STMMAC_RESOURCE_NAME,
1927 .owner = THIS_MODULE,
1928 .pm = &stmmac_pm_ops,
1929 },
1930 };
1931
1932 /**
1933 * stmmac_init_module - Entry point for the driver
1934 * Description: This function is the entry point for the driver.
1935 */
stmmac_init_module(void)1936 static int __init stmmac_init_module(void)
1937 {
1938 int ret;
1939
1940 if (platform_driver_register(&stmmacphy_driver)) {
1941 pr_err("No PHY devices registered!\n");
1942 return -ENODEV;
1943 }
1944
1945 ret = platform_driver_register(&stmmac_driver);
1946 return ret;
1947 }
1948
1949 /**
1950 * stmmac_cleanup_module - Cleanup routine for the driver
1951 * Description: This function is the cleanup routine for the driver.
1952 */
stmmac_cleanup_module(void)1953 static void __exit stmmac_cleanup_module(void)
1954 {
1955 platform_driver_unregister(&stmmacphy_driver);
1956 platform_driver_unregister(&stmmac_driver);
1957 }
1958
1959 #ifndef MODULE
stmmac_cmdline_opt(char * str)1960 static int __init stmmac_cmdline_opt(char *str)
1961 {
1962 char *opt;
1963
1964 if (!str || !*str)
1965 return -EINVAL;
1966 while ((opt = strsep(&str, ",")) != NULL) {
1967 if (!strncmp(opt, "debug:", 6))
1968 strict_strtoul(opt + 6, 0, (unsigned long *)&debug);
1969 else if (!strncmp(opt, "phyaddr:", 8))
1970 strict_strtoul(opt + 8, 0, (unsigned long *)&phyaddr);
1971 else if (!strncmp(opt, "dma_txsize:", 11))
1972 strict_strtoul(opt + 11, 0,
1973 (unsigned long *)&dma_txsize);
1974 else if (!strncmp(opt, "dma_rxsize:", 11))
1975 strict_strtoul(opt + 11, 0,
1976 (unsigned long *)&dma_rxsize);
1977 else if (!strncmp(opt, "buf_sz:", 7))
1978 strict_strtoul(opt + 7, 0, (unsigned long *)&buf_sz);
1979 else if (!strncmp(opt, "tc:", 3))
1980 strict_strtoul(opt + 3, 0, (unsigned long *)&tc);
1981 else if (!strncmp(opt, "watchdog:", 9))
1982 strict_strtoul(opt + 9, 0, (unsigned long *)&watchdog);
1983 else if (!strncmp(opt, "flow_ctrl:", 10))
1984 strict_strtoul(opt + 10, 0,
1985 (unsigned long *)&flow_ctrl);
1986 else if (!strncmp(opt, "pause:", 6))
1987 strict_strtoul(opt + 6, 0, (unsigned long *)&pause);
1988 #ifdef CONFIG_STMMAC_TIMER
1989 else if (!strncmp(opt, "tmrate:", 7))
1990 strict_strtoul(opt + 7, 0, (unsigned long *)&tmrate);
1991 #endif
1992 }
1993 return 0;
1994 }
1995
1996 __setup("stmmaceth=", stmmac_cmdline_opt);
1997 #endif
1998
1999 module_init(stmmac_init_module);
2000 module_exit(stmmac_cleanup_module);
2001
2002 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet driver");
2003 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
2004 MODULE_LICENSE("GPL");
2005