1 /* 2 Copyright (C) 2009 Ivo van Doorn <IvDoorn@gmail.com> 3 Copyright (C) 2009 Alban Browaeys <prahal@yahoo.com> 4 Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org> 5 Copyright (C) 2009 Luis Correia <luis.f.correia@gmail.com> 6 Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de> 7 Copyright (C) 2009 Mark Asselstine <asselsm@gmail.com> 8 Copyright (C) 2009 Xose Vazquez Perez <xose.vazquez@gmail.com> 9 Copyright (C) 2009 Bart Zolnierkiewicz <bzolnier@gmail.com> 10 <http://rt2x00.serialmonkey.com> 11 12 This program is free software; you can redistribute it and/or modify 13 it under the terms of the GNU General Public License as published by 14 the Free Software Foundation; either version 2 of the License, or 15 (at your option) any later version. 16 17 This program is distributed in the hope that it will be useful, 18 but WITHOUT ANY WARRANTY; without even the implied warranty of 19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 GNU General Public License for more details. 21 22 You should have received a copy of the GNU General Public License 23 along with this program; if not, write to the 24 Free Software Foundation, Inc., 25 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 26 */ 27 28 /* 29 Module: rt2800pci 30 Abstract: Data structures and registers for the rt2800pci module. 31 Supported chipsets: RT2800E & RT2800ED. 32 */ 33 34 #ifndef RT2800PCI_H 35 #define RT2800PCI_H 36 37 /* 38 * Queue register offset macros 39 */ 40 #define TX_QUEUE_REG_OFFSET 0x10 41 #define TX_BASE_PTR(__x) (TX_BASE_PTR0 + ((__x) * TX_QUEUE_REG_OFFSET)) 42 #define TX_MAX_CNT(__x) (TX_MAX_CNT0 + ((__x) * TX_QUEUE_REG_OFFSET)) 43 #define TX_CTX_IDX(__x) (TX_CTX_IDX0 + ((__x) * TX_QUEUE_REG_OFFSET)) 44 #define TX_DTX_IDX(__x) (TX_DTX_IDX0 + ((__x) * TX_QUEUE_REG_OFFSET)) 45 46 /* 47 * 8051 firmware image. 48 */ 49 #define FIRMWARE_RT2860 "rt2860.bin" 50 #define FIRMWARE_IMAGE_BASE 0x2000 51 52 /* 53 * DMA descriptor defines. 54 */ 55 #define TXD_DESC_SIZE (4 * sizeof(__le32)) 56 #define RXD_DESC_SIZE (4 * sizeof(__le32)) 57 58 /* 59 * TX descriptor format for TX, PRIO and Beacon Ring. 60 */ 61 62 /* 63 * Word0 64 */ 65 #define TXD_W0_SD_PTR0 FIELD32(0xffffffff) 66 67 /* 68 * Word1 69 */ 70 #define TXD_W1_SD_LEN1 FIELD32(0x00003fff) 71 #define TXD_W1_LAST_SEC1 FIELD32(0x00004000) 72 #define TXD_W1_BURST FIELD32(0x00008000) 73 #define TXD_W1_SD_LEN0 FIELD32(0x3fff0000) 74 #define TXD_W1_LAST_SEC0 FIELD32(0x40000000) 75 #define TXD_W1_DMA_DONE FIELD32(0x80000000) 76 77 /* 78 * Word2 79 */ 80 #define TXD_W2_SD_PTR1 FIELD32(0xffffffff) 81 82 /* 83 * Word3 84 * WIV: Wireless Info Valid. 1: Driver filled WI, 0: DMA needs to copy WI 85 * QSEL: Select on-chip FIFO ID for 2nd-stage output scheduler. 86 * 0:MGMT, 1:HCCA 2:EDCA 87 */ 88 #define TXD_W3_WIV FIELD32(0x01000000) 89 #define TXD_W3_QSEL FIELD32(0x06000000) 90 #define TXD_W3_TCO FIELD32(0x20000000) 91 #define TXD_W3_UCO FIELD32(0x40000000) 92 #define TXD_W3_ICO FIELD32(0x80000000) 93 94 /* 95 * RX descriptor format for RX Ring. 96 */ 97 98 /* 99 * Word0 100 */ 101 #define RXD_W0_SDP0 FIELD32(0xffffffff) 102 103 /* 104 * Word1 105 */ 106 #define RXD_W1_SDL1 FIELD32(0x00003fff) 107 #define RXD_W1_SDL0 FIELD32(0x3fff0000) 108 #define RXD_W1_LS0 FIELD32(0x40000000) 109 #define RXD_W1_DMA_DONE FIELD32(0x80000000) 110 111 /* 112 * Word2 113 */ 114 #define RXD_W2_SDP1 FIELD32(0xffffffff) 115 116 /* 117 * Word3 118 * AMSDU: RX with 802.3 header, not 802.11 header. 119 * DECRYPTED: This frame is being decrypted. 120 */ 121 #define RXD_W3_BA FIELD32(0x00000001) 122 #define RXD_W3_DATA FIELD32(0x00000002) 123 #define RXD_W3_NULLDATA FIELD32(0x00000004) 124 #define RXD_W3_FRAG FIELD32(0x00000008) 125 #define RXD_W3_UNICAST_TO_ME FIELD32(0x00000010) 126 #define RXD_W3_MULTICAST FIELD32(0x00000020) 127 #define RXD_W3_BROADCAST FIELD32(0x00000040) 128 #define RXD_W3_MY_BSS FIELD32(0x00000080) 129 #define RXD_W3_CRC_ERROR FIELD32(0x00000100) 130 #define RXD_W3_CIPHER_ERROR FIELD32(0x00000600) 131 #define RXD_W3_AMSDU FIELD32(0x00000800) 132 #define RXD_W3_HTC FIELD32(0x00001000) 133 #define RXD_W3_RSSI FIELD32(0x00002000) 134 #define RXD_W3_L2PAD FIELD32(0x00004000) 135 #define RXD_W3_AMPDU FIELD32(0x00008000) 136 #define RXD_W3_DECRYPTED FIELD32(0x00010000) 137 #define RXD_W3_PLCP_SIGNAL FIELD32(0x00020000) 138 #define RXD_W3_PLCP_RSSI FIELD32(0x00040000) 139 140 #endif /* RT2800PCI_H */ 141