Searched refs:RF90_PATH_D (Results 1 – 12 of 12) sorted by relevance
604 else if (eRFPath == RF90_PATH_C || eRFPath == RF90_PATH_D) in rtl8192_phy_CheckIsLegalRFPath()1117 …priv->PHYRegDef[RF90_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 MSBs if read 32-bit from 0x8… in rtl8192_InitBBRFRegDef()1123 …priv->PHYRegDef[RF90_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8… in rtl8192_InitBBRFRegDef()1129 priv->PHYRegDef[RF90_PATH_D].rfintfo = rFPGA0_XD_RFInterfaceOE;// 16 LSBs if read 32-bit from 0x86C in rtl8192_InitBBRFRegDef()1135 …priv->PHYRegDef[RF90_PATH_D].rfintfe = rFPGA0_XD_RFInterfaceOE;// 16 MSBs if read 32-bit from 0x86… in rtl8192_InitBBRFRegDef()1141 priv->PHYRegDef[RF90_PATH_D].rf3wireOffset = rFPGA0_XD_LSSIParameter; in rtl8192_InitBBRFRegDef()1147 priv->PHYRegDef[RF90_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter; in rtl8192_InitBBRFRegDef()1153 priv->PHYRegDef[RF90_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage in rtl8192_InitBBRFRegDef()1159 priv->PHYRegDef[RF90_PATH_D].rfHSSIPara1 = rFPGA0_XD_HSSIParameter1; //wire control parameter1 in rtl8192_InitBBRFRegDef()1165 priv->PHYRegDef[RF90_PATH_D].rfHSSIPara2 = rFPGA0_XD_HSSIParameter2; //wire control parameter1 in rtl8192_InitBBRFRegDef()[all …]
131 case RF90_PATH_D: in phy_RF8256_Config_ParaFile()189 case RF90_PATH_D: in phy_RF8256_Config_ParaFile()208 case RF90_PATH_D: in phy_RF8256_Config_ParaFile()
71 RF90_PATH_D = 3, enumerator
71 else if (eRFPath == RF90_PATH_C || eRFPath == RF90_PATH_D) in rtl8192_phy_CheckIsLegalRFPath()585 …priv->PHYRegDef[RF90_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 MSBs if read 32-bit from 0x8… in rtl8192_InitBBRFRegDef()591 …priv->PHYRegDef[RF90_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8… in rtl8192_InitBBRFRegDef()597 priv->PHYRegDef[RF90_PATH_D].rfintfo = rFPGA0_XD_RFInterfaceOE;// 16 LSBs if read 32-bit from 0x86C in rtl8192_InitBBRFRegDef()603 …priv->PHYRegDef[RF90_PATH_D].rfintfe = rFPGA0_XD_RFInterfaceOE;// 16 MSBs if read 32-bit from 0x86… in rtl8192_InitBBRFRegDef()609 priv->PHYRegDef[RF90_PATH_D].rf3wireOffset = rFPGA0_XD_LSSIParameter; in rtl8192_InitBBRFRegDef()615 priv->PHYRegDef[RF90_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter; in rtl8192_InitBBRFRegDef()621 priv->PHYRegDef[RF90_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage in rtl8192_InitBBRFRegDef()627 priv->PHYRegDef[RF90_PATH_D].rfHSSIPara1 = rFPGA0_XD_HSSIParameter1; //wire control parameter1 in rtl8192_InitBBRFRegDef()633 priv->PHYRegDef[RF90_PATH_D].rfHSSIPara2 = rFPGA0_XD_HSSIParameter2; //wire control parameter1 in rtl8192_InitBBRFRegDef()[all …]
143 case RF90_PATH_D: in phy_RF8256_Config_ParaFile()200 case RF90_PATH_D: in phy_RF8256_Config_ParaFile()219 case RF90_PATH_D: in phy_RF8256_Config_ParaFile()
48 RF90_PATH_D = 3, //Radio Path D enumerator
425 rtlphy->phyreg_def[RF90_PATH_D].rfintfs = RFPGA0_XCD_RFINTERFACESW; in _rtl92c_phy_init_bb_rf_register_definition()430 rtlphy->phyreg_def[RF90_PATH_D].rfintfi = RFPGA0_XCD_RFINTERFACERB; in _rtl92c_phy_init_bb_rf_register_definition()446 rtlphy->phyreg_def[RF90_PATH_D].rflssi_select = rFPGA0_XCD_RFPARAMETER; in _rtl92c_phy_init_bb_rf_register_definition()451 rtlphy->phyreg_def[RF90_PATH_D].rftxgain_stage = RFPGA0_TXGAINSTAGE; in _rtl92c_phy_init_bb_rf_register_definition()465 rtlphy->phyreg_def[RF90_PATH_D].rfswitch_control = in _rtl92c_phy_init_bb_rf_register_definition()471 rtlphy->phyreg_def[RF90_PATH_D].rfagc_control1 = ROFDM0_XDAGCCORE1; in _rtl92c_phy_init_bb_rf_register_definition()476 rtlphy->phyreg_def[RF90_PATH_D].rfagc_control2 = ROFDM0_XDAGCCORE2; in _rtl92c_phy_init_bb_rf_register_definition()484 rtlphy->phyreg_def[RF90_PATH_D].rfrxiq_imbalance = in _rtl92c_phy_init_bb_rf_register_definition()490 rtlphy->phyreg_def[RF90_PATH_D].rfrx_afe = ROFDM0_XDRXAFE; in _rtl92c_phy_init_bb_rf_register_definition()498 rtlphy->phyreg_def[RF90_PATH_D].rftxiq_imbalance = in _rtl92c_phy_init_bb_rf_register_definition()[all …]
466 case RF90_PATH_D: in _rtl92c_phy_rf6052_config_parafile()496 case RF90_PATH_D: in _rtl92c_phy_rf6052_config_parafile()507 case RF90_PATH_D: in _rtl92c_phy_rf6052_config_parafile()
359 case RF90_PATH_D: in rtl92ce_phy_config_rf_with_headerfile()
443 case RF90_PATH_D: in _rtl92c_phy_rf6052_config_parafile()468 case RF90_PATH_D: in _rtl92c_phy_rf6052_config_parafile()478 case RF90_PATH_D: in _rtl92c_phy_rf6052_config_parafile()
343 case RF90_PATH_D: in rtl92cu_phy_config_rf_with_headerfile()
109 RF90_PATH_D = 3, enumerator