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Searched refs:REG_WR_INT (Results 1 – 25 of 72) sorted by relevance

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/linux-2.6.39/arch/cris/arch-v32/mach-a3/
Darbiter.c274 REG_WR_INT(marb_bar, regi_marb_bar, rw_h264_rd_burst, 3); in crisv32_arbiter_init()
275 REG_WR_INT(marb_bar, regi_marb_bar, rw_h264_wr_burst, 3); in crisv32_arbiter_init()
276 REG_WR_INT(marb_bar, regi_marb_bar, rw_ccd_burst, 3); in crisv32_arbiter_init()
277 REG_WR_INT(marb_bar, regi_marb_bar, rw_vin_wr_burst, 3); in crisv32_arbiter_init()
278 REG_WR_INT(marb_bar, regi_marb_bar, rw_vin_rd_burst, 3); in crisv32_arbiter_init()
279 REG_WR_INT(marb_bar, regi_marb_bar, rw_sclr_rd_burst, 3); in crisv32_arbiter_init()
280 REG_WR_INT(marb_bar, regi_marb_bar, rw_vout_burst, 3); in crisv32_arbiter_init()
281 REG_WR_INT(marb_bar, regi_marb_bar, rw_sclr_fifo_burst, 3); in crisv32_arbiter_init()
282 REG_WR_INT(marb_bar, regi_marb_bar, rw_l2cache_burst, 3); in crisv32_arbiter_init()
407 REG_WR_INT(marb_bar_bp, in crisv32_arbiter_watch()
[all …]
/linux-2.6.39/arch/cris/arch-v32/drivers/
Diop_fw_load.c111 REG_WR_INT(iop_spu, regi_iop_spu0, rw_seq_pc, (i*4)); in iop_fw_load_spu()
114 REG_WR_INT(iop_spu, regi_iop_spu1, rw_seq_pc, (i*4)); in iop_fw_load_spu()
117 REG_WR_INT(iop_sw_cpu, regi_iop_sw_cpu, rw_mc_data, *data); in iop_fw_load_spu()
158 REG_WR_INT(iop_mpu, regi_iop_mpu, rw_immediate, *data); in iop_fw_load_mpu()
183 REG_WR_INT(iop_mpu, regi_iop_mpu, rw_instr, MPU_BA_I(start_addr)); in iop_start_mpu()
/linux-2.6.39/arch/cris/arch-v32/mach-fs/
Darbiter.c289 REG_WR_INT(marb_bp, watches[i].instance, rw_first_addr, in crisv32_arbiter_watch()
291 REG_WR_INT(marb_bp, watches[i].instance, rw_last_addr, in crisv32_arbiter_watch()
293 REG_WR_INT(marb_bp, watches[i].instance, rw_op, in crisv32_arbiter_watch()
295 REG_WR_INT(marb_bp, watches[i].instance, rw_clients, in crisv32_arbiter_watch()
/linux-2.6.39/arch/cris/include/arch-v32/arch/hwregs/
Ddma.h108 do { REG_WR_INT( dma, inst, rw_group, (int) group_descr ); \
116 do { REG_WR_INT( dma, inst, rw_group_down, (int) ctx_descr ); \
Dmarb_defs.h48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
307 #ifndef REG_WR_INT
308 #define REG_WR_INT( scope, inst, reg, val ) \ macro
Dirq_nmi_defs.h48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
Dstrcop_defs.h48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
Dconfig_defs.h48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
Drt_trace_defs.h48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
/linux-2.6.39/arch/cris/include/arch-v32/mach-fs/mach/hwregs/
Dmarb_defs.h48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
307 #ifndef REG_WR_INT
308 #define REG_WR_INT( scope, inst, reg, val ) \ macro
Dstrmux_defs.h48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
Dconfig_defs.h48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
/linux-2.6.39/arch/cris/include/arch-v32/mach-a3/mach/hwregs/
Dmarb_bar_defs.h45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
329 #ifndef REG_WR_INT
330 #define REG_WR_INT( scope, inst, reg, val ) \ macro
Dstrmux_defs.h45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
Dl2cache_defs.h45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
Dclkgen_defs.h45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
Dmarb_foo_defs.h45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
455 #ifndef REG_WR_INT
456 #define REG_WR_INT( scope, inst, reg, val ) \ macro
/linux-2.6.39/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/
Diop_version_defs.h45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
Diop_sap_in_defs.h45 #ifndef REG_WR_INT
46 #define REG_WR_INT( scope, inst, reg, val ) \ macro
/linux-2.6.39/arch/cris/include/arch-v32/arch/hwregs/iop/
Diop_version_defs.h48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
Diop_scrc_in_defs.h48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
Diop_scrc_out_defs.h48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
Diop_fifo_out_extra_defs.h48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
Diop_fifo_in_extra_defs.h48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro
Diop_trigger_grp_defs.h48 #ifndef REG_WR_INT
49 #define REG_WR_INT( scope, inst, reg, val ) \ macro

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