Searched refs:PMU1_PLL0_PC2_NDIV_INT_MASK (Results 1 – 2 of 2) sorted by relevance
1376 ~(PMU1_PLL0_PC2_NDIV_INT_MASK | PMU1_PLL0_PC2_NDIV_MODE_MASK); in si_pmu1_pllinit0()1380 PMU1_PLL0_PC2_NDIV_INT_MASK) | ((ndiv_mode << in si_pmu1_pllinit0()1474 (tmp & PMU1_PLL0_PC2_NDIV_INT_MASK) >> PMU1_PLL0_PC2_NDIV_INT_SHIFT; in si_pmu1_cpuclk0()2278 tmp &= ~(PMU1_PLL0_PC2_NDIV_INT_MASK); in si_pmu_spuravoid_pllupdate()
938 #define PMU1_PLL0_PC2_NDIV_INT_MASK 0x1ff00000 macro