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Searched refs:PLL_P2_DIVIDE_BY_4 (Results 1 – 4 of 4) sorted by relevance

/linux-2.6.39/drivers/staging/gma500/
Dpsb_intel_reg.h157 # define PLL_P2_DIVIDE_BY_4 (1 << 23) /* i830, required macro
Dpsb_intel_display.c1251 if (dpll & PLL_P2_DIVIDE_BY_4) in psb_intel_crtc_clock_get()
/linux-2.6.39/drivers/gpu/drm/i915/
Di915_reg.h756 #define PLL_P2_DIVIDE_BY_4 (1 << 23) macro
Dintel_display.c4871 dpll |= PLL_P2_DIVIDE_BY_4; in intel_crtc_mode_set()
5667 if (dpll & PLL_P2_DIVIDE_BY_4) in intel_crtc_clock_get()