Searched refs:PLL_BASE_DIVP_MASK (Results 1 – 1 of 1) sorted by relevance
86 #define PLL_BASE_DIVP_MASK (0x7<<20) macro648 c->div *= (val & PLL_BASE_DIVP_MASK) ? 2 : 1; in tegra2_pll_clk_init()694 val &= ~(PLL_BASE_DIVP_MASK | PLL_BASE_DIVN_MASK | in tegra2_pll_clk_set_rate()