Searched refs:PLLDivider (Results 1 – 3 of 3) sorted by relevance
195 …return chipcHw_divide (vcoHz, (((pChipcHw->PLLDivider & 0xFF000000) >> 24) ? ((pChipcHw->PLLDivide… in chipcHw_getClockFrequency()431 …reg32_write(&pChipcHw->PLLDivider, (pChipcHw->PLLDivider & 0x00FFFFFF) | ((chipcHw_REG_PLL_DIVIDER… in chipcHw_setClockFrequency()433 …freq = chipcHw_divide(vcoHz, (((pChipcHw->PLLDivider & 0xFF000000) >> 24) ? ((pChipcHw->PLLDivider… in chipcHw_setClockFrequency()
191 pChipcHw->PLLDivider = chipcHw_REG_PLL_DIVIDER_M1DIV | in chipcHw_pll1Enable()194 pChipcHw->PLLDivider = chipcHw_REG_PLL_DIVIDER_M1DIV | in chipcHw_pll1Enable()
64 uint32_t PLLDivider; /* PLL divider control register (PLL1) */ member