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Searched refs:PHY_DEBUG (Results 1 – 2 of 2) sorted by relevance

/linux-2.6.39/drivers/staging/winbond/
Dphy_calibration.c346 PHY_DEBUG(("[CAL] -> [1]_rxadc_dc_offset_cancellation()\n")); in _rxadc_dc_offset_cancellation_winbond()
354 PHY_DEBUG(("[CAL] W89RF242/11G/Channel=2390Mhz\n")); in _rxadc_dc_offset_cancellation_winbond()
405 PHY_DEBUG(("[CAL] REG_OFFSET_READ = 0x%08X\n", val)); in _rxadc_dc_offset_cancellation_winbond()
407 PHY_DEBUG(("[CAL] ** adc_dc_cal_i = %d (0x%04X)\n", in _rxadc_dc_offset_cancellation_winbond()
409 PHY_DEBUG(("[CAL] ** adc_dc_cal_q = %d (0x%04X)\n", in _rxadc_dc_offset_cancellation_winbond()
448 PHY_DEBUG(("[CAL] -> [2]_txidac_dc_offset_cancellation()\n")); in _txidac_dc_offset_cancellation_winbond()
478 PHY_DEBUG(("[CAL] MODE_CTRL (read) = 0x%08X\n", reg_mode_ctrl)); in _txidac_dc_offset_cancellation_winbond()
490 PHY_DEBUG(("[CAL] MODE_CTRL (write) = 0x%08X\n", reg_mode_ctrl)); in _txidac_dc_offset_cancellation_winbond()
493 PHY_DEBUG(("[CAL] DC_CANCEL (read) = 0x%08X\n", reg_dc_cancel)); in _txidac_dc_offset_cancellation_winbond()
496 PHY_DEBUG(("[CAL] [%d.] ==================================\n", loop)); in _txidac_dc_offset_cancellation_winbond()
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Dwb35reg_s.h233 #define PHY_DEBUG(msg, args...) macro