Searched refs:PAD_CTL_PUS_100K_UP (Results 1 – 7 of 7) sorted by relevance
| /linux-2.6.39/arch/arm/plat-mxc/include/mach/ |
| D | iomux-mx25.h | 158 #define MX25_PAD_D10__USBOTG_OC IOMUX_PAD(0x294, 0x09c, 0x06, 0x57c, 0, PAD_CTL_PUS_100K_UP)
166 #define MX25_PAD_D8__USBH2_OC IOMUX_PAD(0x29c, 0x0a4, 0x06, 0x580, 0, PAD_CTL_PUS_100K_UP)
260 #define MX25_PAD_PWM__USBH2_OC IOMUX_PAD(0x314, 0x11c, 0x16, 0x580, 1, PAD_CTL_PUS_100K_UP)
330 #define MX25_PAD_UART1_RTS__UART1_RTS IOMUX_PAD(0x370, 0x178, 0x10, 0, 0, PAD_CTL_PUS_100K_UP)
334 #define MX25_PAD_UART1_CTS__UART1_CTS IOMUX_PAD(0x374, 0x17c, 0x10, 0, 0, PAD_CTL_PUS_100K_UP)
375 #define KPP_CTL_ROW (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
376 #define KPP_CTL_COL (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
394 … MX25_PAD_KPP_COL0__AUD5_TXD IOMUX_PAD(0x3b0, 0x1b8, 0x12, 0, 0, PAD_CTL_PKE | PAD_CTL_PUS_100K_UP)
399 … MX25_PAD_KPP_COL1__AUD5_RXD IOMUX_PAD(0x3b4, 0x1bc, 0x12, 0, 0, PAD_CTL_PKE | PAD_CTL_PUS_100K_UP)
404 … MX25_PAD_KPP_COL2__AUD5_TXC IOMUX_PAD(0x3b8, 0x1c0, 0x12, 0, 0, PAD_CTL_PKE | PAD_CTL_PUS_100K_UP)
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| D | iomux-v3.h | 95 #define PAD_CTL_PUS_100K_UP (2 << 4) macro
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| D | iomux-mx50.h | 32 PAD_CTL_PUS_100K_UP | PAD_CTL_HYS)
42 PAD_CTL_PUS_100K_UP | PAD_CTL_ODE | \
46 PAD_CTL_PUS_100K_UP | PAD_CTL_DSE_HIGH)
78 PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
294 #define MX50_PAD_ECSPI1_SS0__GPIO_4_15 IOMUX_PAD(0x37C, 0xD0, 1, 0x0, 0, PAD_CTL_PUS_100K_UP)
320 #define MX50_PAD_ECSPI2_MISO__GPIO_4_18 IOMUX_PAD(0x388, 0xDC, 1, 0x0, 0, PAD_CTL_PUS_100K_UP)
932 PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
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| D | iomux-mx51.h | 22 PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP | \
25 PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP | \
28 PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP | \
38 #define MX51_PAD_CTRL_3 (PAD_CTL_PKE | PAD_CTL_PUS_100K_UP)
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| /linux-2.6.39/arch/arm/mach-mx5/ |
| D | board-mx51_efikamx.c | 67 #define MX51_PAD_PCBID0 IOMUX_PAD(0x518, 0x130, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
68 #define MX51_PAD_PCBID1 IOMUX_PAD(0x51C, 0x134, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
69 #define MX51_PAD_PCBID2 IOMUX_PAD(0x504, 0x128, 3, 0x0, 0, PAD_CTL_PUS_100K_UP)
70 #define MX51_PAD_PWRKEY IOMUX_PAD(0x48c, 0x0f8, 1, 0x0, 0, PAD_CTL_PUS_100K_UP | PAD_CTL_PKE)
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| D | board-mx51_efikasb.c | 61 #define MX51_PAD_PWRKEY IOMUX_PAD(0x48c, 0x0f8, 1, 0x0, 0, PAD_CTL_PUS_100K_UP | PAD_CTL_PKE)
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| D | board-mx51_babbage.c | 347 MUX_PAD_CTRL(PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP); in mx51_babbage_init()
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