1 /*
2 * linux/arch/arm/plat-omap/ocpi.c
3 *
4 * Minimal OCP bus support for omap16xx
5 *
6 * Copyright (C) 2003 - 2005 Nokia Corporation
7 * Written by Tony Lindgren <tony@atomide.com>
8 *
9 * Modified for clock framework by Paul Mundt <paul.mundt@nokia.com>.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 */
25
26 #include <linux/module.h>
27 #include <linux/types.h>
28 #include <linux/errno.h>
29 #include <linux/kernel.h>
30 #include <linux/init.h>
31 #include <linux/spinlock.h>
32 #include <linux/err.h>
33 #include <linux/clk.h>
34 #include <linux/io.h>
35
36 #include <mach/hardware.h>
37
38 #define OCPI_BASE 0xfffec320
39 #define OCPI_FAULT (OCPI_BASE + 0x00)
40 #define OCPI_CMD_FAULT (OCPI_BASE + 0x04)
41 #define OCPI_SINT0 (OCPI_BASE + 0x08)
42 #define OCPI_TABORT (OCPI_BASE + 0x0c)
43 #define OCPI_SINT1 (OCPI_BASE + 0x10)
44 #define OCPI_PROT (OCPI_BASE + 0x14)
45 #define OCPI_SEC (OCPI_BASE + 0x18)
46
47 /* USB OHCI OCPI access error registers */
48 #define HOSTUEADDR 0xfffba0e0
49 #define HOSTUESTATUS 0xfffba0e4
50
51 static struct clk *ocpi_ck;
52
53 /*
54 * Enables device access to OMAP buses via the OCPI bridge
55 * FIXME: Add locking
56 */
ocpi_enable(void)57 int ocpi_enable(void)
58 {
59 unsigned int val;
60
61 if (!cpu_is_omap16xx())
62 return -ENODEV;
63
64 /* Enable access for OHCI in OCPI */
65 val = omap_readl(OCPI_PROT);
66 val &= ~0xff;
67 //val &= (1 << 0); /* Allow access only to EMIFS */
68 omap_writel(val, OCPI_PROT);
69
70 val = omap_readl(OCPI_SEC);
71 val &= ~0xff;
72 omap_writel(val, OCPI_SEC);
73
74 return 0;
75 }
76 EXPORT_SYMBOL(ocpi_enable);
77
omap_ocpi_init(void)78 static int __init omap_ocpi_init(void)
79 {
80 if (!cpu_is_omap16xx())
81 return -ENODEV;
82
83 ocpi_ck = clk_get(NULL, "l3_ocpi_ck");
84 if (IS_ERR(ocpi_ck))
85 return PTR_ERR(ocpi_ck);
86
87 clk_enable(ocpi_ck);
88 ocpi_enable();
89 printk("OMAP OCPI interconnect driver loaded\n");
90
91 return 0;
92 }
93
omap_ocpi_exit(void)94 static void __exit omap_ocpi_exit(void)
95 {
96 /* REVISIT: Disable OCPI */
97
98 if (!cpu_is_omap16xx())
99 return;
100
101 clk_disable(ocpi_ck);
102 clk_put(ocpi_ck);
103 }
104
105 MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>");
106 MODULE_DESCRIPTION("OMAP OCPI bus controller module");
107 MODULE_LICENSE("GPL");
108 module_init(omap_ocpi_init);
109 module_exit(omap_ocpi_exit);
110