/linux-2.6.39/drivers/video/riva/ |
D | nv_driver.c | 60 reg52C = NV_RD32(PRAMDAC, 0x052C); in riva_is_connected() 61 reg608 = NV_RD32(PRAMDAC, 0x0608); in riva_is_connected() 67 NV_WR32(PRAMDAC, 0x052C, NV_RD32(PRAMDAC, 0x052C) | 1); in riva_is_connected() 74 present = (NV_RD32(PRAMDAC, 0x0608) & (1 << 28)) ? TRUE : FALSE; in riva_is_connected() 77 NV_RD32(par->riva.PRAMDAC0, 0x0608) & 0x0000EFFF); in riva_is_connected() 139 if (NV_RD32(par->riva.PRAMDAC0, 0x0000052C) & 0x100) in riva_is_second() 145 if(NV_RD32(par->riva.PRAMDAC0, 0x0000252C) & 0x100) in riva_is_second() 165 if (NV_RD32(chip->PFB, 0x00000000) & 0x00000020) { in riva_get_memlen() 166 if (((NV_RD32(chip->PMC, 0x00000000) & 0xF0) == 0x20) in riva_get_memlen() 167 && ((NV_RD32(chip->PMC, 0x00000000)&0x0F)>=0x02)) { in riva_get_memlen() [all …]
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D | riva_hw.c | 65 return ((NV_RD32(&chip->Rop->FifoFree, 0) < chip->FifoEmptyCount) || in nv3Busy() 66 NV_RD32(&chip->PGRAPH[0x000006B0/4], 0) & 0x01); in nv3Busy() 73 return ((NV_RD32(&chip->Rop->FifoFree, 0) < chip->FifoEmptyCount) || in nv4Busy() 74 NV_RD32(&chip->PGRAPH[0x00000700/4], 0) & 0x01); in nv4Busy() 81 return ((NV_RD32(&chip->Rop->FifoFree, 0) < chip->FifoEmptyCount) || in nv10Busy() 82 NV_RD32(&chip->PGRAPH[0x00000700/4], 0) & 0x01); in nv10Busy() 622 pll = NV_RD32(&chip->PRAMDAC0[0x00000504/4], 0); in nv3UpdateArbitrationSettings() 629 sim_data.memory_width = (NV_RD32(&chip->PEXTDEV[0x00000000/4], 0) & 0x10) ? in nv3UpdateArbitrationSettings() 811 pll = NV_RD32(&chip->PRAMDAC0[0x00000504/4], 0); in nv4UpdateArbitrationSettings() 814 pll = NV_RD32(&chip->PRAMDAC0[0x00000500/4], 0); in nv4UpdateArbitrationSettings() [all …]
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D | riva_hw.h | 83 #define NV_RD32(p,i) (__raw_readl((void __iomem *)(p) + (i))) macro 558 (hwinst).FifoFreeCount = NV_RD32(&(hwinst).hwptr->FifoFree, 0) >> 2; \
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D | fbdev.c | 316 tmp_pmc = NV_RD32(par->riva.PMC, 0x10F0) & 0x0000FFFF; in riva_bl_update_status() 317 tmp_pcrt = NV_RD32(par->riva.PCRTC0, 0x081C) & 0xFFFFFFFC; in riva_bl_update_status() 803 newmode.ext.scale = NV_RD32(par->riva.PRAMDAC, 0x00000848) & in riva_load_video_mode() 810 newmode.ext.head = NV_RD32(par->riva.PCRTC0, 0x00000860) & in riva_load_video_mode() 812 newmode.ext.head2 = NV_RD32(par->riva.PCRTC0, 0x00002860) | in riva_load_video_mode() 818 newmode.ext.head = NV_RD32(par->riva.PCRTC0, 0x00000860) | in riva_load_video_mode() 820 newmode.ext.head2 = NV_RD32(par->riva.PCRTC0, 0x00002860) & in riva_load_video_mode() 823 newmode.ext.vpll2 = NV_RD32(par->riva.PRAMDAC0, 0x00000520); in riva_load_video_mode()
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/linux-2.6.39/drivers/video/nvidia/ |
D | nv_hw.c | 83 NV_WR32(par->PRAMDAC, 0x0300, NV_RD32(par->PRAMDAC, 0x0300)); in NVShowHideCursor() 147 pll = NV_RD32(par->PMC, 0x4020); in nvGetClocks() 149 pll = NV_RD32(par->PMC, 0x4024); in nvGetClocks() 162 pll = NV_RD32(par->PMC, 0x4000); in nvGetClocks() 164 pll = NV_RD32(par->PMC, 0x4004); in nvGetClocks() 172 pll = NV_RD32(par->PRAMDAC0, 0x0504); in nvGetClocks() 176 pll = NV_RD32(par->PRAMDAC0, 0x0574); in nvGetClocks() 186 pll = NV_RD32(par->PRAMDAC0, 0x0500); in nvGetClocks() 190 pll = NV_RD32(par->PRAMDAC0, 0x0570); in nvGetClocks() 202 pll = NV_RD32(par->PRAMDAC0, 0x0504); in nvGetClocks() [all …]
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D | nv_setup.c | 174 dac0_reg608 = NV_RD32(PRAMDAC, 0x0608); in NVIsConnected() 178 reg52C = NV_RD32(PRAMDAC, 0x052C); in NVIsConnected() 179 reg608 = NV_RD32(PRAMDAC, 0x0608); in NVIsConnected() 185 NV_WR32(PRAMDAC, 0x052C, NV_RD32(PRAMDAC, 0x052C) | 1); in NVIsConnected() 188 NV_WR32(par->PRAMDAC0, 0x0608, NV_RD32(par->PRAMDAC0, 0x0608) | in NVIsConnected() 193 present = (NV_RD32(PRAMDAC, 0x0608) & (1 << 28)) ? 1 : 0; in NVIsConnected() 226 if (NV_RD32(par->PFB, 0x0000) & 0x00000100) { in nv4GetConfig() 228 ((NV_RD32(par->PFB, 0x0000) >> 12) & 0x0F) * 1024 * 2 + in nv4GetConfig() 231 switch (NV_RD32(par->PFB, 0x0000) & 0x00000003) { in nv4GetConfig() 247 par->CrystalFreqKHz = (NV_RD32(par->PEXTDEV, 0x0000) & 0x00000040) ? in nv4GetConfig() [all …]
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D | nv_backlight.c | 66 tmp_pmc = NV_RD32(par->PMC, 0x10F0) & 0x0000FFFF; in nvidia_bl_update_status() 67 tmp_pcrt = NV_RD32(par->PCRTC0, 0x081C) & 0xFFFFFFFC; in nvidia_bl_update_status() 68 fpcontrol = NV_RD32(par->PRAMDAC, 0x0848) & 0xCFFFFFCC; in nvidia_bl_update_status()
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D | nv_local.h | 67 #define NV_RD32(p,i) (__raw_readl((void __iomem *)(p) + (i))) macro 96 #define READ_GET(par) (NV_RD32(&(par)->FIFO[0x0011], 0) >> 2)
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D | nvidia.c | 427 state->scale = NV_RD32(par->PRAMDAC, 0x00000848) & 0xfff000ff; in nvidia_calc_regs() 437 state->crtcSync = NV_RD32(par->PRAMDAC, 0x0828); in nvidia_calc_regs() 453 state->head = NV_RD32(par->PCRTC0, 0x00000860) & ~0x00001000; in nvidia_calc_regs() 454 state->head2 = NV_RD32(par->PCRTC0, 0x00002860) | 0x00001000; in nvidia_calc_regs() 457 state->vpll = NV_RD32(par->PRAMDAC0, 0x00000508); in nvidia_calc_regs() 459 state->vpllB = NV_RD32(par->PRAMDAC0, 0x00000578); in nvidia_calc_regs() 461 state->head = NV_RD32(par->PCRTC0, 0x00000860) | 0x00001000; in nvidia_calc_regs() 462 state->head2 = NV_RD32(par->PCRTC0, 0x00002860) & ~0x00001000; in nvidia_calc_regs() 464 state->vpll2 = NV_RD32(par->PRAMDAC0, 0x0520); in nvidia_calc_regs() 466 state->vpll2B = NV_RD32(par->PRAMDAC0, 0x057C); in nvidia_calc_regs() [all …]
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D | nv_accel.c | 99 while (--count && NV_RD32(par->PGRAPH, 0x0700)) ; in NVSync()
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