Searched refs:NIG_REG_XGXS_LANE_SEL_P0 (Results 1 – 2 of 2) sorted by relevance
2019 #define NIG_REG_XGXS_LANE_SEL_P0 0x102e8 macro
532 REG_WR(bp, NIG_REG_XGXS_LANE_SEL_P0 + port*4, ser_lane); in bnx2x_emac_enable()1158 REG_WR(bp, NIG_REG_XGXS_LANE_SEL_P0 + port*4, 0x0); in bnx2x_bmac_enable()