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Searched refs:MXS_CLR_ADDR (Results 1 – 3 of 3) sorted by relevance

/linux-2.6.39/arch/arm/mach-mxs/include/mach/
Dmxs.h90 #define MXS_CLR_ADDR 0x8 macro
101 __raw_writel(mask, reg + MXS_CLR_ADDR); in __mxs_clrl()
/linux-2.6.39/drivers/dma/
Dmxs-dma.c159 mxs_dma->base + HW_APBHX_CTRL0 + MXS_CLR_ADDR); in mxs_dma_enable_chan()
162 mxs_dma->base + HW_APBHX_CTRL0 + MXS_CLR_ADDR); in mxs_dma_enable_chan()
211 mxs_dma->base + HW_APBHX_CTRL0 + MXS_CLR_ADDR); in mxs_dma_resume_chan()
214 mxs_dma->base + HW_APBHX_CHANNEL_CTRL + MXS_CLR_ADDR); in mxs_dma_resume_chan()
262 writel(stat1, mxs_dma->base + HW_APBHX_CTRL1 + MXS_CLR_ADDR); in mxs_dma_int_handler()
266 writel(stat2, mxs_dma->base + HW_APBHX_CTRL2 + MXS_CLR_ADDR); in mxs_dma_int_handler()
/linux-2.6.39/drivers/mmc/host/
Dmxs-mmc.c279 host->base + HW_SSP_CTRL1 + MXS_CLR_ADDR); in mxs_mmc_irq_handler()
638 host->base + HW_SSP_CTRL0 + MXS_CLR_ADDR); in mxs_mmc_enable_sdio_irq()
640 host->base + HW_SSP_CTRL1 + MXS_CLR_ADDR); in mxs_mmc_enable_sdio_irq()