1 #ifndef __INCLUDE_ASM_ARCH_MXC_EHCI_H 2 #define __INCLUDE_ASM_ARCH_MXC_EHCI_H 3 4 /* values for portsc field */ 5 #define MXC_EHCI_PHY_LOW_POWER_SUSPEND (1 << 23) 6 #define MXC_EHCI_FORCE_FS (1 << 24) 7 #define MXC_EHCI_UTMI_8BIT (0 << 28) 8 #define MXC_EHCI_UTMI_16BIT (1 << 28) 9 #define MXC_EHCI_SERIAL (1 << 29) 10 #define MXC_EHCI_MODE_UTMI (0 << 30) 11 #define MXC_EHCI_MODE_PHILIPS (1 << 30) 12 #define MXC_EHCI_MODE_ULPI (2 << 30) 13 #define MXC_EHCI_MODE_SERIAL (3 << 30) 14 15 /* values for flags field */ 16 #define MXC_EHCI_INTERFACE_DIFF_UNI (0 << 0) 17 #define MXC_EHCI_INTERFACE_DIFF_BI (1 << 0) 18 #define MXC_EHCI_INTERFACE_SINGLE_UNI (2 << 0) 19 #define MXC_EHCI_INTERFACE_SINGLE_BI (3 << 0) 20 #define MXC_EHCI_INTERFACE_MASK (0xf) 21 22 #define MXC_EHCI_POWER_PINS_ENABLED (1 << 5) 23 #define MXC_EHCI_TTL_ENABLED (1 << 6) 24 25 #define MXC_EHCI_INTERNAL_PHY (1 << 7) 26 #define MXC_EHCI_IPPUE_DOWN (1 << 8) 27 #define MXC_EHCI_IPPUE_UP (1 << 9) 28 #define MXC_EHCI_WAKEUP_ENABLED (1 << 10) 29 #define MXC_EHCI_ITC_NO_THRESHOLD (1 << 11) 30 31 #define MXC_USBCTRL_OFFSET 0 32 #define MXC_USB_PHY_CTR_FUNC_OFFSET 0x8 33 #define MXC_USB_PHY_CTR_FUNC2_OFFSET 0xc 34 #define MXC_USBH2CTRL_OFFSET 0x14 35 36 #define MX5_USBOTHER_REGS_OFFSET 0x800 37 38 /* USB_PHY_CTRL_FUNC2*/ 39 #define MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK 0x3 40 #define MX5_USB_UTMI_PHYCTRL1_PLLDIV_SHIFT 0 41 42 struct mxc_usbh_platform_data { 43 int (*init)(struct platform_device *pdev); 44 int (*exit)(struct platform_device *pdev); 45 46 unsigned int portsc; 47 struct otg_transceiver *otg; 48 }; 49 50 int mx51_initialize_usb_hw(int port, unsigned int flags); 51 int mx25_initialize_usb_hw(int port, unsigned int flags); 52 int mx31_initialize_usb_hw(int port, unsigned int flags); 53 int mx35_initialize_usb_hw(int port, unsigned int flags); 54 int mx27_initialize_usb_hw(int port, unsigned int flags); 55 56 #endif /* __INCLUDE_ASM_ARCH_MXC_EHCI_H */ 57 58