Home
last modified time | relevance | path

Searched refs:MX51_AIPS1_BASE_ADDR (Results 1 – 2 of 2) sorted by relevance

/linux-2.6.39/arch/arm/plat-mxc/include/mach/
Dmx51.h55 #define MX51_AIPS1_BASE_ADDR 0x73f00000 macro
58 #define MX51_OTG_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x80000)
59 #define MX51_GPIO1_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x84000)
60 #define MX51_GPIO2_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x88000)
61 #define MX51_GPIO3_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x8c000)
62 #define MX51_GPIO4_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x90000)
63 #define MX51_KPP_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x94000)
64 #define MX51_WDOG1_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x98000)
65 #define MX51_WDOG2_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0x9c000)
66 #define MX51_GPT1_BASE_ADDR (MX51_AIPS1_BASE_ADDR + 0xa0000)
[all …]
/linux-2.6.39/arch/arm/mach-mx5/
Dcpu.c176 base = MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR); in post_cpu_init()