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Searched refs:MSR_IR (Results 1 – 23 of 23) sorted by relevance

/linux-2.6.39/arch/powerpc/kvm/
Dbook3s_64_mmu.c400 if (vcpu->arch.shared->msr & MSR_IR) { in kvmppc_mmu_book3s_64_slbia()
466 if (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) { in kvmppc_mmu_book3s_64_esid_to_vsid()
472 switch (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) { in kvmppc_mmu_book3s_64_esid_to_vsid()
476 case MSR_IR: in kvmppc_mmu_book3s_64_esid_to_vsid()
482 case MSR_DR|MSR_IR: in kvmppc_mmu_book3s_64_esid_to_vsid()
Dbook3s_32_mmu.c360 if (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) { in kvmppc_mmu_book3s_32_esid_to_vsid()
369 switch (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) { in kvmppc_mmu_book3s_32_esid_to_vsid()
373 case MSR_IR: in kvmppc_mmu_book3s_32_esid_to_vsid()
379 case MSR_DR|MSR_IR: in kvmppc_mmu_book3s_32_esid_to_vsid()
Dbook3s_interrupts.S152 LOAD_REG_IMMEDIATE(r4, MSR_KERNEL & ~(MSR_IR | MSR_DR))
264 LOAD_REG_IMMEDIATE(r3, MSR_KERNEL & ~(MSR_IR | MSR_DR))
Dbook3s.c115 smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE; in kvmppc_recalc_shadow_msr()
148 if ((vcpu->arch.shared->msr & (MSR_PR|MSR_IR|MSR_DR)) != in kvmppc_set_msr()
149 (old_msr & (MSR_PR|MSR_IR|MSR_DR))) { in kvmppc_set_msr()
515 int relocated = (vcpu->arch.shared->msr & (data ? MSR_DR : MSR_IR)); in kvmppc_xlate()
631 bool ir = (vcpu->arch.shared->msr & MSR_IR) ? true : false; in kvmppc_handle_pagefault()
648 switch (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) { in kvmppc_handle_pagefault()
653 case MSR_IR: in kvmppc_handle_pagefault()
656 if ((vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) == MSR_DR) in kvmppc_handle_pagefault()
Dbook3s_rmhandlers.S42 #define MSR_NOIRQ MSR_KERNEL & ~(MSR_IR | MSR_DR)
Dbook3s_segment.S252 ori r7, r7, MSR_IR|MSR_DR|MSR_RI|MSR_ME /* Enable paging */
/linux-2.6.39/arch/powerpc/xmon/
Dxmon.c402 if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) == (MSR_IR|MSR_SF)) in xmon_core()
532 if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) == (MSR_IR|MSR_SF)) { in xmon_core()
581 if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) != (MSR_IR|MSR_SF)) in xmon_bpt()
612 if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) != (MSR_IR|MSR_SF)) in xmon_dabr_match()
622 if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) != (MSR_IR|MSR_SF)) in xmon_iabr_match()
647 if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) == (MSR_IR|MSR_SF)) { in xmon_fault_handler()
932 if ((regs->msr & (MSR_SF|MSR_PR|MSR_IR)) == (MSR_SF|MSR_IR)) { in do_step()
/linux-2.6.39/arch/powerpc/platforms/pasemi/
Dpowersave.S75 LOAD_REG_IMMEDIATE(r6,MSR_DR|MSR_IR|MSR_ME|MSR_EE)
/linux-2.6.39/arch/powerpc/platforms/82xx/
Dpq2.c32 mtmsr(mfmsr() & ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR)); in pq2_restart()
/linux-2.6.39/arch/powerpc/include/asm/
Dreg.h91 #define MSR_IR __MASK(MSR_IR_LG) /* Instruction Relocate */ macro
103 #define MSR_ MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_ISF |MSR_HV
109 #define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR)
Dreg_booke.h24 #define MSR_IS MSR_IR /* Instruction Space */
35 #define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR|MSR_CE)
/linux-2.6.39/arch/powerpc/kernel/
Dkvm_emul.S261 andi. r31, r31, MSR_DR | MSR_IR
Dhead_32.S207 ori r0,r0,MSR_DR|MSR_IR
285 li r10,MSR_KERNEL & ~(MSR_IR|MSR_DR); /* can take exceptions */ \
1003 li r3,MSR_KERNEL & ~(MSR_IR|MSR_DR)
1144 andi. r0,r3,MSR_DR|MSR_IR /* MMU enabled? */
Dhead_40x.S714 andi. r10,r9,MSR_IR|MSR_PR /* check supervisor + MMU off */
868 lis r3,(MSR_KERNEL & ~(MSR_IR|MSR_DR))@h
869 ori r3,r3,(MSR_KERNEL & ~(MSR_IR|MSR_DR))@l
Dhead_8xx.S96 ori r0,r0,MSR_DR|MSR_IR
145 li r10,MSR_KERNEL & ~(MSR_IR|MSR_DR); /* can take exceptions */ \
758 li r3,MSR_KERNEL & ~(MSR_IR|MSR_DR)
Dprocess.c556 if (!(regs->msr & MSR_IR)) in show_instructions()
592 {MSR_IR, "IR"},
Dhead_64.S275 andi. r0,r3,MSR_IR|MSR_DR
Dmisc_64.S518 li r10,MSR_DR|MSR_IR
Dentry_32.S994 li r10,MSR_IR; \
1273 li r9,MSR_KERNEL & ~(MSR_IR|MSR_DR)
Dexceptions-64s.S295 ori r10,r10,MSR_IR|MSR_DR|MSR_RI
Dentry_64.S825 ori r9,r9,MSR_IR|MSR_DR|MSR_FE0|MSR_FE1|MSR_FP|MSR_RI
/linux-2.6.39/arch/powerpc/platforms/52xx/
Dlite5200_sleep.S206 ori r10, r10, MSR_DR | MSR_IR
/linux-2.6.39/arch/powerpc/platforms/83xx/
Dsuspend-asm.S368 rlwinm r4, r4, 0, ~(MSR_IR | MSR_DR)