Searched refs:MSR_FE0 (Results 1 – 8 of 8) sorted by relevance
261 .fpexc_mode = MSR_FE0 | MSR_FE1, \310 return ((msr_bits & MSR_FE0) >> 10) | ((msr_bits & MSR_FE1) >> 8); in __unpack_fe01()315 return ((fpmode << 10) & MSR_FE0) | ((fpmode << 8) & MSR_FE1); in __pack_fe01()
85 #define MSR_FE0 __MASK(MSR_FE0_LG) /* Floating Exception mode 0 */ macro
88 li r10,MSR_FP|MSR_FE0|MSR_FE1148 li r3,MSR_FP|MSR_FE0|MSR_FE1
205 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX); in restore_sigcontext()
910 regs->msr = (regs->msr & ~(MSR_FE0|MSR_FE1)) in set_fpexc_mode()
825 ori r9,r9,MSR_IR|MSR_DR|MSR_FE0|MSR_FE1|MSR_FP|MSR_RI
576 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1); in restore_user_regs()
113 smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_DE; in kvmppc_recalc_shadow_msr()430 to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1); in kvmppc_set_pvr()