1 /* 2 * Copyright (C) 2007 Google, Inc. 3 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved. 4 * Author: Brian Swetland <swetland@google.com> 5 * 6 * This software is licensed under the terms of the GNU General Public 7 * License version 2, as published by the Free Software Foundation, and 8 * may be copied, distributed, and modified under those terms. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * 16 * The MSM peripherals are spread all over across 768MB of physical 17 * space, which makes just having a simple IO_ADDRESS macro to slide 18 * them into the right virtual location rough. Instead, we will 19 * provide a master phys->virt mapping for peripherals here. 20 * 21 */ 22 23 #ifndef __ASM_ARCH_MSM_IOMAP_8X60_H 24 #define __ASM_ARCH_MSM_IOMAP_8X60_H 25 26 /* Physical base address and size of peripherals. 27 * Ordered by the virtual base addresses they will be mapped at. 28 * 29 * MSM_VIC_BASE must be an value that can be loaded via a "mov" 30 * instruction, otherwise entry-macro.S will not compile. 31 * 32 * If you add or remove entries here, you'll want to edit the 33 * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your 34 * changes. 35 * 36 */ 37 38 #define MSM8X60_QGIC_DIST_PHYS 0x02080000 39 #define MSM8X60_QGIC_DIST_SIZE SZ_4K 40 41 #define MSM8X60_QGIC_CPU_PHYS 0x02081000 42 #define MSM8X60_QGIC_CPU_SIZE SZ_4K 43 44 #define MSM_ACC_BASE IOMEM(0xF0002000) 45 #define MSM_ACC_PHYS 0x02001000 46 #define MSM_ACC_SIZE SZ_4K 47 48 #define MSM_GCC_BASE IOMEM(0xF0003000) 49 #define MSM_GCC_PHYS 0x02082000 50 #define MSM_GCC_SIZE SZ_4K 51 52 #define MSM_TLMM_BASE IOMEM(0xF0004000) 53 #define MSM_TLMM_PHYS 0x00800000 54 #define MSM_TLMM_SIZE SZ_16K 55 56 #define MSM_SHARED_RAM_BASE IOMEM(0xF0100000) 57 #define MSM_SHARED_RAM_SIZE SZ_1M 58 59 #define MSM8X60_TMR_PHYS 0x02000000 60 #define MSM8X60_TMR_SIZE SZ_4K 61 62 #define MSM8X60_TMR0_PHYS 0x02040000 63 #define MSM8X60_TMR0_SIZE SZ_4K 64 65 #endif 66