Searched refs:MMU_CONTEXT_ASID_MASK (Results 1 – 10 of 10) sorted by relevance
23 #define MMU_CONTEXT_ASID_MASK 0x0000ffff macro25 #define MMU_CONTEXT_ASID_MASK 0x000000ff macro28 #define MMU_CONTEXT_VERSION_MASK (~0UL & ~MMU_CONTEXT_ASID_MASK)29 #define MMU_CONTEXT_FIRST_VERSION (MMU_CONTEXT_ASID_MASK + 1)41 (cpu_context((cpu), (mm)) & MMU_CONTEXT_ASID_MASK)67 if (!(++asid & MMU_CONTEXT_ASID_MASK)) { in get_mmu_context()167 set_asid(asid_cache(cpu) & MMU_CONTEXT_ASID_MASK); in enable_mmu()
21 return __raw_readl(MMU_PTEAEX) & MMU_CONTEXT_ASID_MASK; in get_asid()44 asid &= MMU_CONTEXT_ASID_MASK; in get_asid()
37 sr = (sr >> SR_ASID_SHIFT) & MMU_CONTEXT_ASID_MASK; in get_asid()
24 #define MMU_CONTEXT_ASID_MASK 0x000000ff macro51 if (!(mc & MMU_CONTEXT_ASID_MASK)) { in get_mmu_context()90 sysreg_write(TLBEHI, asid & MMU_CONTEXT_ASID_MASK); in set_asid()99 return asid & MMU_CONTEXT_ASID_MASK; in get_asid()105 set_asid(mm->context & MMU_CONTEXT_ASID_MASK); in activate_context()140 set_asid(mmu_context_cache & MMU_CONTEXT_ASID_MASK); in enable_mmu()
7 #define MMU_CONTEXT_ASID_MASK (0x000000FF) macro43 if (!(mc & MMU_CONTEXT_ASID_MASK)) { in get_new_mmu_context()98 *(volatile unsigned long *)MASID = (asid & MMU_CONTEXT_ASID_MASK); in set_asid()106 asid &= MMU_CONTEXT_ASID_MASK; in get_asid()118 set_asid(mm_context(mm) & MMU_CONTEXT_ASID_MASK); in activate_context()
462 page |= (mm_context(vma->vm_mm) & MMU_CONTEXT_ASID_MASK); in local_flush_tlb_page()490 asid = mm_context(mm) & MMU_CONTEXT_ASID_MASK; in local_flush_tlb_range()544 set_asid(mmu_context_cache & MMU_CONTEXT_ASID_MASK); in init_mmu()
81 and3 r0, r0, #(MMU_CONTEXT_ASID_MASK)299 and3 r4, r4, #(MMU_CONTEXT_ASID_MASK)
349 va |= (*mmc & MMU_CONTEXT_ASID_MASK); in smp_flush_tlb_page()479 va |= (*mmc & MMU_CONTEXT_ASID_MASK); in smp_invalidate_interrupt()
156 asid = vma->vm_mm->context & MMU_CONTEXT_ASID_MASK; in flush_tlb_page()193 asid = mm->context & MMU_CONTEXT_ASID_MASK; in flush_tlb_range()
107 asid = val & MMU_CONTEXT_ASID_MASK; in tlb_seq_show()