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Searched refs:MIPS_CPU_VEIC (Results 1 – 3 of 3) sorted by relevance

/linux-2.6.39/arch/mips/include/asm/
Dcpu.h284 #define MIPS_CPU_VEIC 0x00100000 /* CPU supports MIPSR2 external interrupt controller mode */ macro
Dcpu-features.h232 # define cpu_has_veic (cpu_data[0].options & MIPS_CPU_VEIC)
/linux-2.6.39/arch/mips/kernel/
Dcpu-probe.c723 c->options |= MIPS_CPU_VEIC; in decode_config3()