Searched refs:MC_CONTROL_REG1_SINTEN (Results 1 – 2 of 2) sorted by relevance
41 #define MC_CONTROL_REG1_SINTEN 0x01 macro
440 outb(reg1 ^ MC_CONTROL_REG1_SINTEN, in madgemc_interrupt()540 if ((val == 0) && (reg1 & MC_CONTROL_REG1_SINTEN)) { in madgemc_setint()541 outb(reg1 ^ MC_CONTROL_REG1_SINTEN, in madgemc_setint()544 outb(reg1 | MC_CONTROL_REG1_SINTEN, in madgemc_setint()