Searched refs:MCF_MBAR2 (Results 1 – 3 of 3) sorted by relevance
23 #define MCF_MBAR2 0x80000000 macro114 #define MCFSIM2_GPIOREAD (MCF_MBAR2 + 0x000) /* GPIO read values */115 #define MCFSIM2_GPIOWRITE (MCF_MBAR2 + 0x004) /* GPIO write values */116 #define MCFSIM2_GPIOENABLE (MCF_MBAR2 + 0x008) /* GPIO enabled */117 #define MCFSIM2_GPIOFUNC (MCF_MBAR2 + 0x00C) /* GPIO function */118 #define MCFSIM2_GPIO1READ (MCF_MBAR2 + 0x0B0) /* GPIO1 read values */119 #define MCFSIM2_GPIO1WRITE (MCF_MBAR2 + 0x0B4) /* GPIO1 write values */120 #define MCFSIM2_GPIO1ENABLE (MCF_MBAR2 + 0x0B8) /* GPIO1 enabled */121 #define MCFSIM2_GPIO1FUNC (MCF_MBAR2 + 0x0BC) /* GPIO1 function */
23 imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_mask()25 writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_mask()31 imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_unmask()33 writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); in intc2_irq_gpio_unmask()38 writel(0x1 << (d->irq - MCFINTC2_GPIOIRQ0), MCF_MBAR2 + MCFSIM2_GPIOINTCLEAR); in intc2_irq_gpio_ack()
268 gpio = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); in m5249_smc91x_init()269 writel(gpio | 0x40, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); in m5249_smc91x_init()271 gpio = readl(MCF_MBAR2 + MCFSIM2_INTLEVEL5); in m5249_smc91x_init()272 writel(gpio | 0x04000000, MCF_MBAR2 + MCFSIM2_INTLEVEL5); in m5249_smc91x_init()