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Searched refs:MAX_PHASE (Results 1 – 5 of 5) sorted by relevance

/linux-2.6.39/drivers/usb/host/
Duhci-hcd.h91 #define MAX_PHASE 32 /* Periodic scheduling length */ macro
431 short load[MAX_PHASE]; /* Periodic allocations */
Duhci-q.c614 for (phase += period; phase < MAX_PHASE; phase += period) in uhci_highest_load()
633 int max_phase = min_t(int, MAX_PHASE, qh->period); in uhci_check_bandwidth()
665 for (i = qh->phase; i < MAX_PHASE; i += qh->period) { in uhci_reserve_bandwidth()
670 uhci->total_load / MAX_PHASE; in uhci_reserve_bandwidth()
698 for (i = qh->phase; i < MAX_PHASE; i += qh->period) { in uhci_release_bandwidth()
703 uhci->total_load / MAX_PHASE; in uhci_release_bandwidth()
1102 qh->phase = (qh->period / 2) & (MAX_PHASE - 1); in uhci_submit_interrupt()
Duhci-debug.c363 for (i = 0; i < MAX_PHASE; ++i) { in uhci_sprint_schedule()
/linux-2.6.39/drivers/staging/rts_pstor/
Dsd.h222 #define MAX_PHASE 31 macro
Dsd.c1619 struct timing_phase_path path[MAX_PHASE + 1]; in sd_search_final_phase()
1637 for (i = 0; i < MAX_PHASE + 1; i++) { in sd_search_final_phase()
1666 if ((path[0].start == 0) && (path[cont_path_cnt - 1].end == MAX_PHASE)) { in sd_search_final_phase()
1667 path[0].start = path[cont_path_cnt - 1].start - MAX_PHASE - 1; in sd_search_final_phase()
1671 path[0].mid += MAX_PHASE + 1; in sd_search_final_phase()
1701 final_phase = (u8)(temp_final_phase + MAX_PHASE + 1); in sd_search_final_phase()
1713 final_phase = (u8)(temp_final_phase + MAX_PHASE + 1); in sd_search_final_phase()
1751 for (j = MAX_PHASE; j >= 0; j--) { in sd_tuning_rx()
1794 for (i = MAX_PHASE; i >= 0; i--) { in sd_ddr_pre_tuning_tx()
1858 for (j = MAX_PHASE; j >= 0; j--) { in sd_tuning_tx()