1 #ifndef _MAX1363_H_
2 #define _MAX1363_H_
3
4 #define MAX1363_SETUP_BYTE(a) ((a) | 0x80)
5
6 /* There is a fair bit more defined here than currently
7 * used, but the intention is to support everything these
8 * chips do in the long run */
9
10 /* see data sheets */
11 /* max1363 and max1236, max1237, max1238, max1239 */
12 #define MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_VDD 0x00
13 #define MAX1363_SETUP_AIN3_IS_REF_EXT_TO_REF 0x20
14 #define MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_INT 0x40
15 #define MAX1363_SETUP_AIN3_IS_REF_REF_IS_INT 0x60
16 #define MAX1363_SETUP_POWER_UP_INT_REF 0x10
17 #define MAX1363_SETUP_POWER_DOWN_INT_REF 0x00
18
19 /* think about includeing max11600 etc - more settings */
20 #define MAX1363_SETUP_EXT_CLOCK 0x08
21 #define MAX1363_SETUP_INT_CLOCK 0x00
22 #define MAX1363_SETUP_UNIPOLAR 0x00
23 #define MAX1363_SETUP_BIPOLAR 0x04
24 #define MAX1363_SETUP_RESET 0x00
25 #define MAX1363_SETUP_NORESET 0x02
26 /* max1363 only - though don't care on others.
27 * For now monitor modes are not implemented as the relevant
28 * line is not connected on my test board.
29 * The definitions are here as I intend to add this soon.
30 */
31 #define MAX1363_SETUP_MONITOR_SETUP 0x01
32
33 /* Specific to the max1363 */
34 #define MAX1363_MON_RESET_CHAN(a) (1 << ((a) + 4))
35 #define MAX1363_MON_INT_ENABLE 0x01
36
37 /* defined for readability reasons */
38 /* All chips */
39 #define MAX1363_CONFIG_BYTE(a) ((a))
40
41 #define MAX1363_CONFIG_SE 0x01
42 #define MAX1363_CONFIG_DE 0x00
43 #define MAX1363_CONFIG_SCAN_TO_CS 0x00
44 #define MAX1363_CONFIG_SCAN_SINGLE_8 0x20
45 #define MAX1363_CONFIG_SCAN_MONITOR_MODE 0x40
46 #define MAX1363_CONFIG_SCAN_SINGLE_1 0x60
47 /* max123{6-9} only */
48 #define MAX1236_SCAN_MID_TO_CHANNEL 0x40
49
50 /* max1363 only - merely part of channel selects or don't care for others*/
51 #define MAX1363_CONFIG_EN_MON_MODE_READ 0x18
52
53 #define MAX1363_CHANNEL_SEL(a) ((a) << 1)
54
55 /* max1363 strictly 0x06 - but doesn't matter */
56 #define MAX1363_CHANNEL_SEL_MASK 0x1E
57 #define MAX1363_SCAN_MASK 0x60
58 #define MAX1363_SE_DE_MASK 0x01
59
60 /**
61 * struct max1363_mode - scan mode information
62 * @conf: The corresponding value of the configuration register
63 * @modemask: Bit mask corresponding to channels enabled in this mode
64 */
65 struct max1363_mode {
66 int8_t conf;
67 long modemask;
68 };
69
70 #define MAX1363_MODE_SINGLE(_num, _mask) { \
71 .conf = MAX1363_CHANNEL_SEL(_num) \
72 | MAX1363_CONFIG_SCAN_SINGLE_1 \
73 | MAX1363_CONFIG_SE, \
74 .modemask = _mask, \
75 }
76
77 #define MAX1363_MODE_SCAN_TO_CHANNEL(_num, _mask) { \
78 .conf = MAX1363_CHANNEL_SEL(_num) \
79 | MAX1363_CONFIG_SCAN_TO_CS \
80 | MAX1363_CONFIG_SE, \
81 .modemask = _mask, \
82 }
83
84
85 /* note not available for max1363 hence naming */
86 #define MAX1236_MODE_SCAN_MID_TO_CHANNEL(_mid, _num, _mask) { \
87 .conf = MAX1363_CHANNEL_SEL(_num) \
88 | MAX1236_SCAN_MID_TO_CHANNEL \
89 | MAX1363_CONFIG_SE, \
90 .modemask = _mask \
91 }
92
93 #define MAX1363_MODE_DIFF_SINGLE(_nump, _numm, _mask) { \
94 .conf = MAX1363_CHANNEL_SEL(_nump) \
95 | MAX1363_CONFIG_SCAN_SINGLE_1 \
96 | MAX1363_CONFIG_DE, \
97 .modemask = _mask \
98 }
99
100 /* Can't think how to automate naming so specify for now */
101 #define MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(_num, _numvals, _mask) { \
102 .conf = MAX1363_CHANNEL_SEL(_num) \
103 | MAX1363_CONFIG_SCAN_TO_CS \
104 | MAX1363_CONFIG_DE, \
105 .modemask = _mask \
106 }
107
108 /* note only available for max1363 hence naming */
109 #define MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(_num, _numvals, _mask) { \
110 .conf = MAX1363_CHANNEL_SEL(_num) \
111 | MAX1236_SCAN_MID_TO_CHANNEL \
112 | MAX1363_CONFIG_SE, \
113 .modemask = _mask \
114 }
115
116 /* This may seem an overly long winded way to do this, but at least it makes
117 * clear what all the various options actually do. Alternative suggestions
118 * that don't require user to have intimate knowledge of the chip welcomed.
119 */
120 enum max1363_channels {
121 max1363_in0, max1363_in1, max1363_in2, max1363_in3,
122 max1363_in4, max1363_in5, max1363_in6, max1363_in7,
123 max1363_in8, max1363_in9, max1363_in10, max1363_in11,
124
125 max1363_in0min1, max1363_in2min3,
126 max1363_in4min5, max1363_in6min7,
127 max1363_in8min9, max1363_in10min11,
128
129 max1363_in1min0, max1363_in3min2,
130 max1363_in5min4, max1363_in7min6,
131 max1363_in9min8, max1363_in11min10,
132 };
133
134 /* This must be maintained along side the max1363_mode_table in max1363_core */
135 enum max1363_modes {
136 /* Single read of a single channel */
137 _s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7, _s8, _s9, _s10, _s11,
138 /* Differential single read */
139 d0m1, d2m3, d4m5, d6m7, d8m9, d10m11,
140 d1m0, d3m2, d5m4, d7m6, d9m8, d11m10,
141 /* Scan to channel and mid to channel where overlapping */
142 s0to1, s0to2, s2to3, s0to3, s0to4, s0to5, s0to6,
143 s6to7, s0to7, s6to8, s0to8, s6to9,
144 s0to9, s6to10, s0to10, s6to11, s0to11,
145 /* Differential scan to channel and mid to channel where overlapping */
146 d0m1to2m3, d0m1to4m5, d0m1to6m7, d6m7to8m9,
147 d0m1to8m9, d6m7to10m11, d0m1to10m11, d1m0to3m2,
148 d1m0to5m4, d1m0to7m6, d7m6to9m8, d1m0to9m8,
149 d7m6to11m10, d1m0to11m10,
150 };
151
152 /**
153 * struct max1363_chip_info - chip specifc information
154 * @name: indentification string for chip
155 * @num_inputs: number of physical inputs on chip
156 * @bits: accuracy of the adc in bits
157 * @int_vref_mv: the internal reference voltage
158 * @monitor_mode: whether the chip supports monitor interrupts
159 * @mode_list: array of available scan modes
160 * @num_modes: the number of scan modes available
161 * @default_mode: the scan mode in which the chip starts up
162 */
163 struct max1363_chip_info {
164 u8 num_inputs;
165 u8 bits;
166 u16 int_vref_mv;
167 bool monitor_mode;
168 const enum max1363_modes *mode_list;
169 int num_modes;
170 enum max1363_modes default_mode;
171 struct attribute_group *dev_attrs;
172 struct attribute_group *scan_attrs;
173 };
174
175 /**
176 * struct max1363_state - driver instance specific data
177 * @indio_dev: the industrial I/O device
178 * @client: i2c_client
179 * @setupbyte: cache of current device setup byte
180 * @configbyte: cache of current device config byte
181 * @chip_info: chip model specific constants, available modes etc
182 * @current_mode: the scan mode of this chip
183 * @requestedmask: a valid requested set of channels
184 * @poll_work: bottom half of polling interrupt handler
185 * @protect_ring: used to ensure only one polling bh running at a time
186 * @reg: supply regulator
187 * @monitor_on: whether monitor mode is enabled
188 * @monitor_speed: parameter corresponding to device monitor speed setting
189 * @mask_high: bitmask for enabled high thresholds
190 * @mask_low: bitmask for enabled low thresholds
191 * @thresh_high: high threshold values
192 * @thresh_low: low threshold values
193 * @last_timestamp: timestamp of last event interrupt
194 * @thresh_work: bh work structure for event handling
195 */
196 struct max1363_state {
197 struct iio_dev *indio_dev;
198 struct i2c_client *client;
199 u8 setupbyte;
200 u8 configbyte;
201 const struct max1363_chip_info *chip_info;
202 const struct max1363_mode *current_mode;
203 u32 requestedmask;
204 struct work_struct poll_work;
205 atomic_t protect_ring;
206 struct iio_trigger *trig;
207 struct regulator *reg;
208
209 /* Using monitor modes and buffer at the same time is
210 currently not supported */
211 bool monitor_on;
212 unsigned int monitor_speed:3;
213 u8 mask_high;
214 u8 mask_low;
215 /* 4x unipolar first then the fours bipolar ones */
216 s16 thresh_high[8];
217 s16 thresh_low[8];
218 s64 last_timestamp;
219 struct work_struct thresh_work;
220 };
221
222 const struct max1363_mode
223 *max1363_match_mode(u32 mask, const struct max1363_chip_info *ci);
224
225 int max1363_set_scan_mode(struct max1363_state *st);
226
227 #ifdef CONFIG_MAX1363_RING_BUFFER
228
229 int max1363_single_channel_from_ring(long mask, struct max1363_state *st);
230 int max1363_register_ring_funcs_and_init(struct iio_dev *indio_dev);
231 void max1363_ring_cleanup(struct iio_dev *indio_dev);
232
233 #else /* CONFIG_MAX1363_RING_BUFFER */
234
max1363_single_channel_from_ring(long mask,struct max1363_state * st)235 int max1363_single_channel_from_ring(long mask, struct max1363_state *st)
236 {
237 return -EINVAL;
238 }
239
240 static inline int
max1363_register_ring_funcs_and_init(struct iio_dev * indio_dev)241 max1363_register_ring_funcs_and_init(struct iio_dev *indio_dev)
242 {
243 return 0;
244 }
245
max1363_ring_cleanup(struct iio_dev * indio_dev)246 static inline void max1363_ring_cleanup(struct iio_dev *indio_dev)
247 {
248 }
249 #endif /* CONFIG_MAX1363_RING_BUFFER */
250 #endif /* _MAX1363_H_ */
251