Searched refs:LVDS_PORT_EN (Results 1 – 6 of 6) sorted by relevance
85 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN); in intel_lvds_enable()138 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN); in intel_lvds_disable()995 if (crtc && (lvds & LVDS_PORT_EN)) { in intel_lvds_init()
1446 #define LVDS_PORT_EN (1 << 31) macro1490 (((V) & (LVDS_PIPE_MASK | LVDS_PORT_EN)) == ((P) << 30 | LVDS_PORT_EN))
1661 I915_WRITE(reg, val & ~LVDS_PORT_EN); in intel_disable_pch_ports()2846 if ((temp & LVDS_PORT_EN) == 0) in ironlake_crtc_enable()2847 I915_WRITE(PCH_LVDS, temp | LVDS_PORT_EN); in ironlake_crtc_enable()4972 temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP; in intel_crtc_mode_set()5647 bool is_lvds = (pipe == 1) && (I915_READ(LVDS) & LVDS_PORT_EN); in intel_crtc_clock_get()
279 (REG_READ(LVDS) & LVDS_PORT_EN) != 0) { in psb_intel_find_best_PLL()719 LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP | in psb_intel_crtc_mode_set()1207 is_lvds = (pipe == 1) && (REG_READ(LVDS) & LVDS_PORT_EN); in psb_intel_crtc_clock_get()1222 is_lvds = (pipe == 1) && (dev_priv->saveLVDS & LVDS_PORT_EN); in psb_intel_crtc_clock_get()
324 # define LVDS_PORT_EN (1 << 31) macro
833 if (crtc && (lvds & LVDS_PORT_EN)) { in psb_intel_lvds_init()