Searched refs:LVDS (Results 1 – 12 of 12) sorted by relevance
660 par->LVDS = 0; in NVCommonSetup()664 par->LVDS = 1; in NVCommonSetup()665 printk("nvidiafb: Panel is %s\n", par->LVDS ? "LVDS" : "TMDS"); in NVCommonSetup()
134 int LVDS; member
279 lvds_priv->saveLVDS = REG_READ(LVDS); in psb_intel_lvds_save()336 REG_WRITE(LVDS, lvds_priv->saveLVDS); in psb_intel_lvds_restore()829 lvds = REG_READ(LVDS); in psb_intel_lvds_init()
279 (REG_READ(LVDS) & LVDS_PORT_EN) != 0) { in psb_intel_find_best_PLL()286 if ((REG_READ(LVDS) & LVDS_CLKB_POWER_MASK) == in psb_intel_find_best_PLL()716 u32 lvds = REG_READ(LVDS); in psb_intel_crtc_mode_set()735 REG_WRITE(LVDS, lvds); in psb_intel_crtc_mode_set()736 REG_READ(LVDS); in psb_intel_crtc_mode_set()1207 is_lvds = (pipe == 1) && (REG_READ(LVDS) & LVDS_PORT_EN); in psb_intel_crtc_clock_get()
319 #define LVDS 0x61180 macro
82 lvds_reg = LVDS; in intel_lvds_enable()123 lvds_reg = LVDS; in intel_lvds_disable()991 lvds = I915_READ(LVDS); in intel_lvds_init()
634 dev_priv->saveLVDS = I915_READ(LVDS); in i915_save_display()728 I915_WRITE(LVDS, dev_priv->saveLVDS); in i915_restore_display()
742 #define LVDS 0x61180 macro1441 #define LVDS 0x61180 macro
682 if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) == in intel_g4x_limit()813 (I915_READ(LVDS)) != 0) { in intel_find_best_PLL()820 if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) == in intel_find_best_PLL()884 lvds_reg = LVDS; in intel_g4x_find_best_PLL()1175 lvds_reg = LVDS; in assert_panel_unlocked()4967 reg = LVDS; in intel_crtc_mode_set()5647 bool is_lvds = (pipe == 1) && (I915_READ(LVDS) & LVDS_PORT_EN); in intel_crtc_clock_get()
149 12: 12-Bit LVDS or 12-Bit TMDS (default)150 24: 24-Bit LVDS or 24-Bit TMDS
268 #define LVDS 0x61180 macro
284 if (INREG(LVDS) & PORT_ENABLE) in intelfbhw_check_non_crt()580 hw->lvds = INREG(LVDS); in intelfbhw_read_hw_state()