1 /* 2 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. 3 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. 4 */ 5 6 /* 7 * The code contained herein is licensed under the GNU General Public 8 * License. You may obtain a copy of the GNU General Public License 9 * Version 2 or later at the following locations: 10 * 11 * http://www.opensource.org/licenses/gpl-license.html 12 * http://www.gnu.org/copyleft/gpl.html 13 */ 14 #ifndef __ASM_PLAT_PLATFORM_H 15 #define __ASM_PLAT_PLATFORM_H 16 17 #ifndef __ASSEMBLER__ 18 #include <linux/io.h> 19 #endif 20 #include <asm/sizes.h> 21 22 /* Virtual address where registers are mapped */ 23 #define STMP3XXX_REGS_PHBASE 0x80000000 24 #ifdef __ASSEMBLER__ 25 #define STMP3XXX_REGS_BASE 0xF0000000 26 #else 27 #define STMP3XXX_REGS_BASE (void __iomem *)0xF0000000 28 #endif 29 #define STMP3XXX_REGS_SIZE SZ_1M 30 31 /* Virtual address where OCRAM is mapped */ 32 #define STMP3XXX_OCRAM_PHBASE 0x00000000 33 #ifdef __ASSEMBLER__ 34 #define STMP3XXX_OCRAM_BASE 0xf1000000 35 #else 36 #define STMP3XXX_OCRAM_BASE (void __iomem *)0xf1000000 37 #endif 38 #define STMP3XXX_OCRAM_SIZE (32 * SZ_1K) 39 40 #ifdef CONFIG_ARCH_STMP37XX 41 #define IRQ_PRIORITY_REG_RD HW_ICOLL_PRIORITYn_RD 42 #define IRQ_PRIORITY_REG_WR HW_ICOLL_PRIORITYn_WR 43 #endif 44 45 #ifdef CONFIG_ARCH_STMP378X 46 #define IRQ_PRIORITY_REG_RD HW_ICOLL_INTERRUPTn_RD 47 #define IRQ_PRIORITY_REG_WR HW_ICOLL_INTERRUPTn_WR 48 #endif 49 50 #define HW_STMP3XXX_SET 0x04 51 #define HW_STMP3XXX_CLR 0x08 52 #define HW_STMP3XXX_TOG 0x0c 53 54 #ifndef __ASSEMBLER__ stmp3xxx_clearl(u32 v,void __iomem * r)55static inline void stmp3xxx_clearl(u32 v, void __iomem *r) 56 { 57 __raw_writel(v, r + HW_STMP3XXX_CLR); 58 } 59 stmp3xxx_setl(u32 v,void __iomem * r)60static inline void stmp3xxx_setl(u32 v, void __iomem *r) 61 { 62 __raw_writel(v, r + HW_STMP3XXX_SET); 63 } 64 #endif 65 66 #define BF(value, field) (((value) << BP_##field) & BM_##field) 67 68 #endif /* __ASM_ARCH_PLATFORM_H */ 69