Searched refs:HC_CONFIG_0_REG_MSI_MSIX_INT_EN_0 (Results 1 – 2 of 2) sorted by relevance
1106 val |= (HC_CONFIG_0_REG_MSI_MSIX_INT_EN_0 | in bnx2x_hc_int_enable()1111 HC_CONFIG_0_REG_MSI_MSIX_INT_EN_0 | in bnx2x_hc_int_enable()1115 HC_CONFIG_0_REG_MSI_MSIX_INT_EN_0 | in bnx2x_hc_int_enable()1125 val &= ~HC_CONFIG_0_REG_MSI_MSIX_INT_EN_0; in bnx2x_hc_int_enable()1242 HC_CONFIG_0_REG_MSI_MSIX_INT_EN_0 | in bnx2x_hc_int_disable()
807 #define HC_CONFIG_0_REG_MSI_MSIX_INT_EN_0 (0x1<<2) macro