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Searched refs:GT_WRITE (Results 1 – 9 of 9) sorted by relevance

/linux-2.6.39/arch/mips/wrppmc/
Dirq.c40 GT_WRITE(GT_INTRCAUSE_OFS, (0x1F << 21)); in gt64120_init_pic()
41 GT_WRITE(GT_HINTRCAUSE_OFS, 0x00); in gt64120_init_pic()
44 GT_WRITE(GT_INTRMASK_OFS, 0x00); in gt64120_init_pic()
45 GT_WRITE(GT_HINTRMASK_OFS, 0x00); in gt64120_init_pic()
46 GT_WRITE(GT_PCI0_ICMASK_OFS, 0x00); in gt64120_init_pic()
47 GT_WRITE(GT_PCI0_HICMASK_OFS, 0x00); in gt64120_init_pic()
Dtime.c31 GT_WRITE(GT_TC_CONTROL_OFS, 0x00); in plat_time_init()
32 GT_WRITE(GT_TC0_OFS, 0x00); in plat_time_init()
33 GT_WRITE(GT_TC1_OFS, 0x00); in plat_time_init()
34 GT_WRITE(GT_TC2_OFS, 0x00); in plat_time_init()
35 GT_WRITE(GT_TC3_OFS, 0x00); in plat_time_init()
/linux-2.6.39/arch/mips/kernel/
Dirq-gt641xx.c40 GT_WRITE(GT_INTRCAUSE_OFS, cause); in ack_gt641xx_irq()
52 GT_WRITE(GT_INTRMASK_OFS, mask); in mask_gt641xx_irq()
64 GT_WRITE(GT_INTRMASK_OFS, mask); in mask_ack_gt641xx_irq()
68 GT_WRITE(GT_INTRCAUSE_OFS, cause); in mask_ack_gt641xx_irq()
80 GT_WRITE(GT_INTRMASK_OFS, mask); in unmask_gt641xx_irq()
120 GT_WRITE(GT_INTRMASK_OFS, 0); in gt641xx_irq_init()
121 GT_WRITE(GT_INTRCAUSE_OFS, 0); in gt641xx_irq_init()
Dcevt-gt641xx.c42 GT_WRITE(GT_TC0_OFS, gt641xx_base_clock / HZ); in gt641xx_timer0_state()
43 GT_WRITE(GT_TC_CONTROL_OFS, GT_TC_CONTROL_ENTC0_MSK); in gt641xx_timer0_state()
59 GT_WRITE(GT_TC0_OFS, delta); in gt641xx_timer0_set_next_event()
60 GT_WRITE(GT_TC_CONTROL_OFS, ctrl); in gt641xx_timer0_set_next_event()
88 GT_WRITE(GT_TC_CONTROL_OFS, ctrl); in gt641xx_timer0_set_mode()
128 GT_WRITE(GT_TC0_OFS, gt641xx_base_clock / HZ); in gt641xx_timer0_clockevent_init()
/linux-2.6.39/arch/mips/pci/
Dops-gt64xxx_pci0.c52 GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT | in gt64xxx_pci0_pcibios_config_access()
56 GT_WRITE(GT_PCI0_CFGADDR_OFS, in gt64xxx_pci0_pcibios_config_access()
68 GT_WRITE(GT_PCI0_CFGDATA_OFS, *data); in gt64xxx_pci0_pcibios_config_access()
89 GT_WRITE(GT_INTRCAUSE_OFS, ~(GT_INTRCAUSE_MASABORT0_BIT | in gt64xxx_pci0_pcibios_config_access()
Dfixup-cobalt.c170 GT_WRITE(GT_PCI0_TOR_OFS, 0x4020); in qube_raq_galileo_fixup()
178 GT_WRITE(GT_PCI0_TOR_OFS, in qube_raq_galileo_fixup()
184 GT_WRITE(GT_INTRMASK_OFS, GT_INTR_RETRYCTR0_MSK | GT_READ(GT_INTRMASK_OFS)); in qube_raq_galileo_fixup()
/linux-2.6.39/arch/mips/mti-malta/
Dmalta-init.c263 GT_WRITE(GT_PCI0_CMD_OFS, GT_PCI0_CMD_MBYTESWAP_BIT | in prom_init()
266 GT_WRITE(GT_PCI0_CMD_OFS, 0); in prom_init()
273 GT_WRITE(GT_PCI0IOREMAP_OFS, map); in prom_init()
Dmalta-pci.c104 GT_WRITE(GT_PCI0_CFGADDR_OFS, in mips_pcibios_init()
112 GT_WRITE(GT_PCI0_CFGDATA_OFS, CPHYSADDR(MIPS_GT_BASE)); in mips_pcibios_init()
/linux-2.6.39/arch/mips/include/asm/
Dgt64120.h575 #define GT_WRITE(ofs, data) __GT_WRITE(ofs, cpu_to_le32(data)) macro