Searched refs:EASIL1_MMUMMU_IRQSTATUS_WRITE_REGISTER32 (Results 1 – 2 of 2) sorted by relevance
25 #define EASIL1_MMUMMU_IRQSTATUS_WRITE_REGISTER32 (MMU_BASE_EASIL1 + 51) macro
65 _DEBUG_LEVEL1_EASI(EASIL1_MMUMMU_IRQSTATUS_WRITE_REGISTER32);\