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Searched refs:DPLL_B (Results 1 – 4 of 4) sorted by relevance

/linux-2.6.39/drivers/staging/gma500/
Dpsb_intel_display.c426 int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B; in psb_intel_crtc_dpms()
585 int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B; in psb_intel_crtc_mode_set()
871 crtc_state->saveDPLL = REG_READ(pipeA ? DPLL_A : DPLL_B); in psb_intel_crtc_save()
939 REG_READ(pipeA ? DPLL_A : DPLL_B), in psb_intel_crtc_restore()
974 REG_WRITE(pipeA ? DPLL_A : DPLL_B, in psb_intel_crtc_restore()
976 REG_READ(pipeA ? DPLL_A : DPLL_B); in psb_intel_crtc_restore()
978 REG_READ(pipeA ? DPLL_A : DPLL_B)); in psb_intel_crtc_restore()
988 REG_WRITE(pipeA ? DPLL_A : DPLL_B, crtc_state->saveDPLL); in psb_intel_crtc_restore()
989 REG_READ(pipeA ? DPLL_A : DPLL_B); in psb_intel_crtc_restore()
1202 dpll = REG_READ((pipe == 0) ? DPLL_A : DPLL_B); in psb_intel_crtc_clock_get()
Dpsb_intel_reg.h132 #define DPLL_B 0x06018 macro
/linux-2.6.39/drivers/video/intelfb/
Dintelfbhw.h148 #define DPLL_B 0x06018 macro
Dintelfbhw.c533 hw->dpll_b = INREG(DPLL_B); in intelfbhw_read_hw_state()
1318 dpll_reg = DPLL_B; in intelfbhw_program_mode()