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Searched refs:DMA5_CURR_ADDR (Results 1 – 12 of 12) sorted by relevance

/linux-2.6.39/arch/blackfin/mach-bf533/include/mach/
DdefBF532.h264 #define DMA5_CURR_ADDR 0xFFC00D64 /* DMA Channel 5 Current Address Register */ macro
DcdefBF532.h292 #define bfin_read_DMA5_CURR_ADDR() bfin_read32(DMA5_CURR_ADDR)
293 #define bfin_write_DMA5_CURR_ADDR(val) bfin_write32(DMA5_CURR_ADDR,val)
/linux-2.6.39/arch/blackfin/mach-bf518/include/mach/
DdefBF512.h299 #define DMA5_CURR_ADDR 0xFFC00D64 /* DMA Channel 5 Current Address Register */ macro
DcdefBF512.h528 #define bfin_read_DMA5_CURR_ADDR() bfin_read32(DMA5_CURR_ADDR)
529 #define bfin_write_DMA5_CURR_ADDR(val) bfin_write32(DMA5_CURR_ADDR, val)
/linux-2.6.39/arch/blackfin/mach-bf527/include/mach/
DdefBF522.h299 #define DMA5_CURR_ADDR 0xFFC00D64 /* DMA Channel 5 Current Address Register */ macro
DcdefBF522.h545 #define bfin_read_DMA5_CURR_ADDR() bfin_read32(DMA5_CURR_ADDR)
546 #define bfin_write_DMA5_CURR_ADDR(val) bfin_write32(DMA5_CURR_ADDR, val)
/linux-2.6.39/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h275 #define DMA5_CURR_ADDR 0xFFC00D64 /* DMA Channel 5 Current Address Register … macro
DcdefBF534.h507 #define bfin_read_DMA5_CURR_ADDR() bfin_read32(DMA5_CURR_ADDR)
508 #define bfin_write_DMA5_CURR_ADDR(val) bfin_write32(DMA5_CURR_ADDR,val)
/linux-2.6.39/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h276 #define DMA5_CURR_ADDR 0xFFC00D64 /* DMA Channel 5 Current Address Register */ macro
DcdefBF538.h632 #define bfin_read_DMA5_CURR_ADDR() bfin_readPTR(DMA5_CURR_ADDR)
633 #define bfin_write_DMA5_CURR_ADDR(val) bfin_writePTR(DMA5_CURR_ADDR, val)
/linux-2.6.39/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h295 #define DMA5_CURR_ADDR 0xffc00d64 /* DMA Channel 5 Current Address Register */ macro
DcdefBF54x_base.h470 #define bfin_read_DMA5_CURR_ADDR() bfin_read32(DMA5_CURR_ADDR)
471 #define bfin_write_DMA5_CURR_ADDR(val) bfin_write32(DMA5_CURR_ADDR, val)