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Searched refs:DMA4_START_ADDR (Results 1 – 12 of 12) sorted by relevance

/linux-2.6.39/arch/blackfin/mach-bf533/include/mach/
DdefBF532.h244 #define DMA4_START_ADDR 0xFFC00D04 /* DMA Channel 4 Start Address Register */ macro
DcdefBF532.h253 #define bfin_read_DMA4_START_ADDR() bfin_read32(DMA4_START_ADDR)
254 #define bfin_write_DMA4_START_ADDR(val) bfin_write32(DMA4_START_ADDR,val)
/linux-2.6.39/arch/blackfin/mach-bf518/include/mach/
DdefBF512.h278 #define DMA4_START_ADDR 0xFFC00D04 /* DMA Channel 4 Start Address Register */ macro
DcdefBF512.h489 #define bfin_read_DMA4_START_ADDR() bfin_read32(DMA4_START_ADDR)
490 #define bfin_write_DMA4_START_ADDR(val) bfin_write32(DMA4_START_ADDR, val)
/linux-2.6.39/arch/blackfin/mach-bf527/include/mach/
DdefBF522.h278 #define DMA4_START_ADDR 0xFFC00D04 /* DMA Channel 4 Start Address Register */ macro
DcdefBF522.h506 #define bfin_read_DMA4_START_ADDR() bfin_read32(DMA4_START_ADDR)
507 #define bfin_write_DMA4_START_ADDR(val) bfin_write32(DMA4_START_ADDR, val)
/linux-2.6.39/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h254 #define DMA4_START_ADDR 0xFFC00D04 /* DMA Channel 4 Start Address Register … macro
DcdefBF534.h468 #define bfin_read_DMA4_START_ADDR() bfin_read32(DMA4_START_ADDR)
469 #define bfin_write_DMA4_START_ADDR(val) bfin_write32(DMA4_START_ADDR,val)
/linux-2.6.39/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h255 #define DMA4_START_ADDR 0xFFC00D04 /* DMA Channel 4 Start Address Register */ macro
DcdefBF538.h592 #define bfin_read_DMA4_START_ADDR() bfin_readPTR(DMA4_START_ADDR)
593 #define bfin_write_DMA4_START_ADDR(val) bfin_writePTR(DMA4_START_ADDR, val)
/linux-2.6.39/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h272 #define DMA4_START_ADDR 0xffc00d04 /* DMA Channel 4 Start Address Register */ macro
DcdefBF54x_base.h427 #define bfin_read_DMA4_START_ADDR() bfin_read32(DMA4_START_ADDR)
428 #define bfin_write_DMA4_START_ADDR(val) bfin_write32(DMA4_START_ADDR, val)