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Searched refs:DMA0_START_ADDR (Results 1 – 12 of 12) sorted by relevance

/linux-2.6.39/arch/blackfin/mach-bf533/include/mach/
DdefBF532.h188 #define DMA0_START_ADDR 0xFFC00C04 /* DMA Channel 0 Start Address Register */ macro
DcdefBF532.h145 #define bfin_read_DMA0_START_ADDR() bfin_read32(DMA0_START_ADDR)
146 #define bfin_write_DMA0_START_ADDR(val) bfin_write32(DMA0_START_ADDR,val)
/linux-2.6.39/arch/blackfin/mach-bf518/include/mach/
DdefBF512.h222 #define DMA0_START_ADDR 0xFFC00C04 /* DMA Channel 0 Start Address Register */ macro
DcdefBF512.h381 #define bfin_read_DMA0_START_ADDR() bfin_read32(DMA0_START_ADDR)
382 #define bfin_write_DMA0_START_ADDR(val) bfin_write32(DMA0_START_ADDR, val)
/linux-2.6.39/arch/blackfin/mach-bf527/include/mach/
DdefBF522.h222 #define DMA0_START_ADDR 0xFFC00C04 /* DMA Channel 0 Start Address Register */ macro
DcdefBF522.h398 #define bfin_read_DMA0_START_ADDR() bfin_read32(DMA0_START_ADDR)
399 #define bfin_write_DMA0_START_ADDR(val) bfin_write32(DMA0_START_ADDR, val)
/linux-2.6.39/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h198 #define DMA0_START_ADDR 0xFFC00C04 /* DMA Channel 0 Start Address Register … macro
DcdefBF534.h360 #define bfin_read_DMA0_START_ADDR() bfin_read32(DMA0_START_ADDR)
361 #define bfin_write_DMA0_START_ADDR(val) bfin_write32(DMA0_START_ADDR,val)
/linux-2.6.39/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h199 #define DMA0_START_ADDR 0xFFC00C04 /* DMA Channel 0 Start Address Register */ macro
DcdefBF538.h488 #define bfin_read_DMA0_START_ADDR() bfin_readPTR(DMA0_START_ADDR)
489 #define bfin_write_DMA0_START_ADDR(val) bfin_writePTR(DMA0_START_ADDR, val)
/linux-2.6.39/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h208 #define DMA0_START_ADDR 0xffc00c04 /* DMA Channel 0 Start Address Register */ macro
DcdefBF54x_base.h311 #define bfin_read_DMA0_START_ADDR() bfin_read32(DMA0_START_ADDR)
312 #define bfin_write_DMA0_START_ADDR(val) bfin_write32(DMA0_START_ADDR, val)