| /linux-2.6.39/Documentation/video4linux/ |
| D | pxa_camera.txt | 8 This is due to DMA constraints, which transfers only planes of 8 byte
20 capture. The new buffers are "appended" at the tail of the DMA chain, and
38 | | DMA: stop | | DMA: stop | |
45 | | DMA hotlink missed | | Capture running | |
48 | | DMA: stop | / | DMA: run | | |
50 | ^ /DMA still | | channels |
51 | | capture list / running | DMA Irq End | not |
58 | DMA: run | | DMA: run | |
67 | DMA: run | | DMA: stop |
76 - "DMA: stop" means all 3 DMA channels are stopped
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| /linux-2.6.39/drivers/dma/ |
| D | Kconfig | 2 # DMA engine configuration
6 bool "DMA Engine support"
9 DMA engines can do asynchronous data transfers without
13 DMA Device drivers supported by the configured arch, it may
17 bool "DMA Engine debugging"
21 say N here. This enables DMA engine core and driver debugging.
24 bool "DMA Engine verbose debugging"
29 the DMA engine core and drivers.
34 comment "DMA Devices"
37 tristate "Intel MID DMA support for Peripheral DMA controllers"
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| /linux-2.6.39/Documentation/ |
| D | DMA-ISA-LPC.txt | 1 DMA with ISA and LPC devices
6 This document describes how to do DMA transfers using the old ISA DMA
8 uses the same DMA system so it will be around for quite some time.
13 To do ISA style DMA you need to include two headers:
18 The first is the generic DMA API used to convert virtual addresses to
19 physical addresses (see Documentation/DMA-API.txt for details).
21 The second contains the routines specific to ISA DMA transfers. Since
29 The ISA DMA controller has some very strict requirements on which
33 (You usually need a special buffer for DMA transfers instead of
36 The DMA-able address space is the lowest 16 MB of _physical_ memory.
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| D | DMA-attributes.txt | 1 DMA attributes
4 This document describes the semantics of the DMA attributes that are
10 DMA_ATTR_WRITE_BARRIER is a (write) barrier attribute for DMA. DMA
12 all pending DMA writes to complete, and thus provides a mechanism to
13 strictly order DMA from a device across all intervening busses and
17 the way from the DMA device to memory.
20 useful, suppose that a device does a DMA write to indicate that data is
21 ready and available in memory. The DMA of the "completion indication"
22 could race with data DMA. Mapping the memory used for completion
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| D | DMA-API-HOWTO.txt | 1 Dynamic DMA mapping Guide
8 This is a guide to device driver writers on how to use the DMA API
10 DMA-API.txt.
13 addresses (DMA addresses) into physical addresses. This is similar to
16 access with a Single Address Cycle (32bit DMA address) any page in the
19 system, so that the virt_to_bus() static scheme works (the DMA address
23 So that Linux can use the dynamic DMA mapping, it needs some help from the
24 drivers, namely it has to take into account that DMA addresses should be
25 mapped only for the time they are actually used and unmapped after the DMA
31 Note that the DMA API works with any bus independent of the underlying
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| D | Intel-IOMMU.txt | 12 DMAR - DMA remapping
13 DRHD - DMA Engine Reporting Structure
21 ACPI enumerates and lists the different DMA engines in the platform, and
22 device scope relationships between PCI devices and which DMA engine controls
30 reserved in the e820 map. When we turn on DMA translation, DMA to those
39 that needs to perform DMA. Once DMA is completed and mapping is no longer
49 Different DMA engines may support different number of domains.
70 When errors are reported, the DMA engine signals via an interrupt. The fault
96 PCI-DMA: Using DMAR IOMMU
101 DMAR:[DMA Write] Request device [00:02.0] fault addr 6df084000
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| /linux-2.6.39/arch/cris/ |
| D | Kconfig | 327 bool "Enable DMA on synchronous serial port 0."
330 A synchronous serial port can run in manual or DMA mode.
331 Selecting this option will make it run in DMA mode.
340 bool "Enable DMA on synchronous serial port 1."
343 A synchronous serial port can run in manual or DMA mode.
344 Selecting this option will make it run in DMA mode.
378 prompt "Ser0 DMA out channel"
384 bool "Ser0 uses no DMA for output"
386 Do not use DMA for ser0 output.
393 If you do not enable DMA, an interrupt for each character will be
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| /linux-2.6.39/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | dma.txt | 1 * Freescale 83xx DMA Controller
3 Freescale PowerPC 83xx have on chip general purpose DMA controllers.
11 - reg : <registers mapping for DMA general status reg>
13 DMA controller channels.
15 - interrupts : <interrupt mapping for DMA IRQ>
19 - DMA channel nodes:
28 - interrupts : <interrupt mapping for DMA channel IRQ>
73 * Freescale 85xx/86xx DMA Controller
75 Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
83 - reg : <registers mapping for DMA general status reg>
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| D | ssi.txt | 27 - fsl,playback-dma: Phandle to a node for the DMA channel to use for
30 - fsl,capture-dma: Phandle to a node for the DMA channel to use for
60 On SOCs that have an SSI, specific DMA channels are hard-wired for playback
61 and capture. On the MPC8610, for example, SSI1 must use DMA channel 0 for
62 playback and DMA channel 1 for capture. SSI2 must use DMA channel 2 for
63 playback and DMA channel 3 for capture. The developer can choose which
64 DMA controller to use, but the channels themselves are hard-wired. The
67 The device tree nodes for the DMA channels that are referenced by
71 "fsl,elo-dma-channel" or "fsl,eloplus-dma-channel", then the generic Elo DMA
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| /linux-2.6.39/arch/sh/drivers/dma/ |
| D | Kconfig | 1 menu "DMA support"
5 bool "SuperH on-chip DMA controller (DMAC) support"
21 bool "SuperH DMA API support"
24 SH_DMA_API always enabled DMA API of used SuperH.
25 If you want to use DMA ENGINE, you must not enable this.
45 bool "Override default number of maximum DMA channels"
48 DMA channels for a given board. If this is unset, this will default
52 int "Maximum number of DMA channels"
56 This allows you to specify the maximum number of DMA channels to
66 Say Y if you want to use Audio/USB DMA on your SH7760 board.
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| /linux-2.6.39/Documentation/arm/Samsung-S3C24XX/ |
| D | DMA.txt | 1 S3C2410 DMA
7 The kernel provides an interface to manage DMA transfers
8 using the DMA channels in the CPU, so that the central
13 DMA Channel Ordering
16 Many of the range do not have connections for the DMA
21 DMA code can be given a DMA ordering structure which
26 each channel within has a slot for a list of DMA
28 the presence of a DMA channel number with DMA_CH_VALID
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| /linux-2.6.39/Documentation/usb/ |
| D | dma.txt | 2 over how DMA may be used to perform I/O operations. The APIs are detailed
8 The big picture is that USB drivers can continue to ignore most DMA issues,
9 though they still must provide DMA-ready buffers (see
10 Documentation/PCI/PCI-DMA-mapping.txt). That's how they've worked through
13 OR: they can now be DMA-aware.
15 - New calls enable DMA-aware drivers, letting them allocate dma buffers and
22 - "usbcore" will map this DMA address, if a DMA-aware driver didn't do
26 - There's a new "generic DMA API", parts of which are usable by USB device
38 IOMMU to manage the DMA mappings. It can cost MUCH more to set up and
58 not using a streaming DMA mapping, so it's good for small transfers on
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| /linux-2.6.39/Documentation/devicetree/bindings/powerpc/4xx/ |
| D | ppc440spe-adma.txt | 1 PPC440SPe DMA/XOR (DMA Controller and XOR Accelerator)
4 are specified hereby. These are I2O/DMA, DMA and XOR nodes
5 for DMA engines and Memory Queue Module node. The latter is used
9 DMA devices.
28 ii) The DMA node
33 - cell-index : 1 cell, hardware index of the DMA engine
39 and DMA Error IRQ (on UIC1). The latter is common
40 for both DMA engines>.
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| /linux-2.6.39/Documentation/sound/oss/ |
| D | ultrasound | 11 dma DMA channel for the Sound Blaster
12 dma16 2nd DMA channel, only needed for full duplex operation
15 no_wave_dma Set to disable DMA usage for wavetable (see note)
22 DSP to use DMA for playback and downloading samples. This is the same
23 as the old behaviour. If set to 1, no DMA is needed for downloading samples,
29 just one 8 bit DMA channel. Recording will not work with one DMA
|
| D | ESS1868 | 8 * The ESS1868 does not allow use of a 16-bit DMA, thus DMA 0, 1, 2, and 3
20 For configuring the sound card's I/O addresses, IRQ and DMA, here is a
27 (DMA 0 (CHANNEL 1))
40 the MPU-401 MIDI port is located at 0x0330. IRQ is IRQ 5, DMA is channel 1.
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| /linux-2.6.39/arch/blackfin/mach-bf548/ |
| D | Kconfig | 32 bool "DMA has priority over core for ext. accesses"
46 prompt "UART2 DMA channel selection"
50 UART2 DMA channel selection
58 bool "UART2 DMA RX -> DMA18 TX -> DMA19"
60 UART2 DMA channel assignment
63 use SPORT2 default DMA channel
66 bool "UART2 DMA RX -> DMA13 TX -> DMA14"
68 UART2 DMA channel assignment
71 use EPPI1 EPPI2 default DMA channel
75 prompt "UART3 DMA channel selection"
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| /linux-2.6.39/Documentation/video4linux/cx2341x/ |
| D | fw-dma.txt | 1 This page describes the structures and procedures used by the cx2341x DMA
7 The cx2341x PCI interface is busmaster capable. This means it has a DMA
23 Mailbox #10 is reserved for DMA transfer information.
30 This section describes, in general, the order of events when handling DMA
37 - The driver schedules the DMA transfer via the ScheduleDMAtoHost API call.
38 - The card raises the DMA Complete interrupt.
39 - The driver checks the DMA status register for any errors.
42 NOTE! It is possible that the Encoder and DMA Complete interrupts get raised
65 addresses are the physical memory location of the target DMA buffer.
86 DMA Transfer Status
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| D | fw-memory.txt | 43 DMA Registers 0x000-0xff:
47 0x04 - DMA status:
49 0x08 - pci DMA pointer for read link list
50 0x0c - pci DMA pointer for write link list
51 0x10 - read/write DMA enable:
55 0x1c - always 0x20 or 32, smaller values slow down DMA transactions
62 if changed to 0xffffffff DMA write interrupts break.
72 0x8c-0xdc - rest of write linked list reg, 8 sets of 3 total, DMA goes here
127 27 Encoder DMA complete
130 20 Decoder DMA complete
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| /linux-2.6.39/Documentation/sound/alsa/soc/ |
| D | platform.txt | 4 An ASoC platform driver can be divided into audio DMA and SoC DAI configuration
8 Audio DMA
11 The platform DMA driver optionally supports the following ALSA operations:-
23 The platform driver exports its DMA functionality via struct
49 Please refer to the ALSA driver documentation for details of audio DMA.
52 An example DMA driver is soc/pxa/pxa2xx-pcm.c
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| /linux-2.6.39/drivers/net/wireless/b43legacy/ |
| D | Kconfig | 74 bool "DMA + PIO"
78 Include both, Direct Memory Access (DMA) and Programmed I/O (PIO)
81 default DMA is used, otherwise PIO is used.
86 bool "DMA (Direct Memory Access) only"
89 Only include Direct Memory Access (DMA).
97 This reduces the size of the driver module, by omitting the DMA code.
98 Please note that PIO transfers are slow (compared to DMA).
102 You should use PIO only if DMA does not work for you.
|
| /linux-2.6.39/Documentation/spi/ |
| D | pxa2xx | 8 - SSP PIO and SSP DMA data transfers.
41 The "pxa2xx_spi_master.enable_dma" field informs the driver that SSP DMA should
42 be used. This caused the driver to acquire two DMA channels: rx_channel and
43 tx_channel. The rx_channel has a higher DMA service priority the tx_channel.
44 See the "PXA2xx Developer Manual" section "DMA Controller".
67 .enable_dma = 1, /* Enables NSSP DMA */
120 The "pxa2xx_spi_chip.dma_burst_size" field is used to configure PXA2xx DMA
122 the PXA2xx "Developer Manual" sections on the DMA controller and SSP Controllers
216 DMA and PIO I/O Support
218 The pxa2xx_spi driver supports both DMA and interrupt driven PIO message
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| /linux-2.6.39/Documentation/networking/ |
| D | 3c505.txt | 3 This driver now uses DMA. There is currently no support for PIO operation.
4 The default DMA channel is 6; this is _not_ autoprobed, so you must
11 default DMA channel.
29 I still see "DMA upload timed out" messages from time to time. These
43 DMA mode, more fixes, etc, by Philip Blundell <pjb27@cam.ac.uk>
44 Multicard support, Software configurable DMA, etc., by
|
| D | ltpc.txt | 12 line, and DMA channel of the card, this does not always work. For
22 where the parameters (in order) are the port address, IRQ, and DMA
81 DMA -- choose DMA 1 or 3, and set both corresponding switches.
83 SW4 DMA 3
84 SW5 DMA 1
85 SW6 DMA 3
86 SW7 DMA 1
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| /linux-2.6.39/drivers/usb/musb/ |
| D | Kconfig | 144 bool 'Disable DMA (always use PIO)'
149 DMA controllers are ignored.
151 Do not select 'n' here unless DMA support for your SOC or board
152 is unavailable (or unstable). When DMA is enabled at compile time,
161 Enable DMA transfers using Mentor's engine.
168 Enable DMA transfers when TI CPPI DMA is available.
177 Enable DMA transfers on TUSB 6010 when OMAP DMA is available.
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| /linux-2.6.39/Documentation/PCI/ |
| D | pci.txt | 47 Set the DMA mask size (for both coherent and streaming DMA)
52 Enable DMA/processing engines
58 Stop all DMA activity
59 Release DMA buffers (both streaming and coherent)
117 Intended to stop any idling DMA operations.
261 Set the DMA mask size (for both coherent and streaming DMA)
266 Enable DMA/processing engines.
295 pci_set_master() will enable DMA by setting the bus master bit
298 disable DMA by clearing the bus master bit.
338 3.3 Set the DMA mask size
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