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Searched refs:DIV_U16 (Results 1 – 2 of 2) sorted by relevance

/linux-2.6.39/arch/arm/mach-tegra/
Dclock.h31 #define DIV_U16 (1 << 4) macro
Dtegra2_clocks.c939 } else if (c->flags & DIV_U16) { in tegra2_periph_clk_init()
1078 } else if (c->flags & DIV_U16) { in tegra2_periph_clk_set_rate()
1110 } else if (c->flags & DIV_U16) { in tegra2_periph_clk_round_rate()
2161 …PH_CLK("i2c1", "tegra-i2c.0", NULL, 12, 0x124, 26000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U16),
2162 …PH_CLK("i2c2", "tegra-i2c.1", NULL, 54, 0x198, 26000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U16),
2163 …PH_CLK("i2c3", "tegra-i2c.2", NULL, 67, 0x1b8, 26000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U16),
2164 …IPH_CLK("dvc", "tegra-i2c.3", NULL, 47, 0x128, 26000000, mux_pllp_pllc_pllm_clkm, MUX | DIV_U16),