Searched refs:CLK_X (Results 1 – 4 of 4) sorted by relevance
260 en_lo = CEIL_DIV(Trp[mode], CLK_X); in nand_onfi_timing_set()261 en_hi = CEIL_DIV(Treh[mode], CLK_X); in nand_onfi_timing_set()263 if ((en_hi * CLK_X) < (Treh[mode] + 2)) in nand_onfi_timing_set()267 if ((en_lo + en_hi) * CLK_X < Trc[mode]) in nand_onfi_timing_set()268 en_lo += CEIL_DIV((Trc[mode] - (en_lo + en_hi) * CLK_X), CLK_X); in nand_onfi_timing_set()274 data_invalid_rhoh = en_lo * CLK_X + Trhoh[mode]; in nand_onfi_timing_set()276 data_invalid_rloh = (en_lo + en_hi) * CLK_X + Trloh[mode]; in nand_onfi_timing_set()288 acc_clks = CEIL_DIV(Trea[mode], CLK_X); in nand_onfi_timing_set()290 while (((acc_clks * CLK_X) - Trea[mode]) < 3) in nand_onfi_timing_set()293 if ((data_invalid - acc_clks * CLK_X) < 2) in nand_onfi_timing_set()[all …]
635 #define CLK_X 5 macro
186 en_lo = CEIL_DIV(Trp[mode], CLK_X); in NAND_ONFi_Timing_Mode()187 en_hi = CEIL_DIV(Treh[mode], CLK_X); in NAND_ONFi_Timing_Mode()190 if ((en_hi * CLK_X) < (Treh[mode] + 2)) in NAND_ONFi_Timing_Mode()194 if ((en_lo + en_hi) * CLK_X < Trc[mode]) in NAND_ONFi_Timing_Mode()195 en_lo += CEIL_DIV((Trc[mode] - (en_lo + en_hi) * CLK_X), CLK_X); in NAND_ONFi_Timing_Mode()201 data_invalid_rhoh = en_lo * CLK_X + Trhoh[mode]; in NAND_ONFi_Timing_Mode()203 data_invalid_rloh = (en_lo + en_hi) * CLK_X + Trloh[mode]; in NAND_ONFi_Timing_Mode()215 acc_clks = CEIL_DIV(Trea[mode], CLK_X); in NAND_ONFi_Timing_Mode()217 while (((acc_clks * CLK_X) - Trea[mode]) < 3) in NAND_ONFi_Timing_Mode()220 if ((data_invalid - acc_clks * CLK_X) < 2) in NAND_ONFi_Timing_Mode()[all …]
33 #define CLK_X 5 macro