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Searched refs:CLKDIVC0_OFFS (Results 1 – 2 of 2) sorted by relevance

/linux-2.6.39/arch/arm/mach-tcc8k/
Dclock.c186 addr = CKC_BASE + CLKDIVC0_OFFS; in get_rate_pll_div()
192 addr = CKC_BASE + CLKDIVC0_OFFS; in get_rate_pll_div()
210 u32 reg = __raw_readl(CKC_BASE + CLKDIVC0_OFFS); in get_rate_xi_div()
221 u32 reg = __raw_readl(CKC_BASE + CLKDIVC0_OFFS); in get_rate_xti_div()
/linux-2.6.39/arch/arm/plat-tcc/include/mach/
Dtcc8k-regs.h657 #define CLKDIVC0_OFFS 0x0c macro