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Searched refs:CCR1 (Results 1 – 4 of 4) sorted by relevance

/linux-2.6.39/drivers/net/wan/
Ddscc4.c268 #define CCR1 0x0c macro
869 scc_writel(0x02408000, dpriv, dev, CCR1); in dscc4_init_registers()
1430 state = scc_readl(dpriv, CCR1); in dscc4_loopback_setting()
1438 scc_writel(state, dpriv, dev, CCR1); in dscc4_loopback_setting()
1455 scc_patchl(CrcMask, crc[i].bits, dpriv, dev, CCR1); in dscc4_crc_setting()
Dpc300-falc-lh.h1133 #define CCR1 0x09 /* Common Configuration Reg 1 */ macro
Dpc300_drv.c920 cpc_writeb(falcbase + F_REG(CCR1, ch), 0); in falc_init_t1()
1132 cpc_writeb(falcbase + F_REG(CCR1, ch), 0); in falc_init_e1()
/linux-2.6.39/drivers/char/pcmcia/
Dsynclink_cs.c271 #define CCR1 0x2d macro
2961 write_reg(info, CHB + CCR1, 0x17); in enable_auxclk()
3007 val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0); in loopback_enable()
3008 write_reg(info, CHA + CCR1, val); in loopback_enable()
3121 write_reg(info, CHA + CCR1, val); in hdlc_mode()
3448 write_reg(info, CHA + CCR1, 0x1f); in async_mode()
3571 set_reg_bits(info, CHA + CCR1, BIT3); in tx_set_idle()
3573 clear_reg_bits(info, CHA + CCR1, BIT3); in tx_set_idle()