Searched refs:BIT_4 (Results 1 – 14 of 14) sorted by relevance
37 #define PDF_CLASS_2 BIT_4747 #define LCF_COND_PLOGI BIT_4 /* PLOGI only if not logged-in. */748 #define LCF_IMPL_LOGO BIT_4 /* Perform an implicit LOGO. */749 #define LCF_IMPL_PRLO BIT_4 /* Perform an implicit PRLO. */806 #define TCF_LUN_RESET BIT_4919 #define CSRX_MAX_WRT_BURST_MASK (BIT_5|BIT_4)988 #define GPDX_LED_COLOR_MASK (BIT_4|BIT_3|BIT_2)994 #define GPDX_LED_AMBER_ON BIT_41368 #define FSTATE_WAITING_FOR_VERIFY BIT_4
62 #define BIT_4 0x10 macro225 #define SRB_CRC_PROT_DMA_VALID BIT_4 /* DIF: prot DMA valid */592 #define FO1_DISABLE_LIP_F7_SW BIT_4745 #define MBX_4 BIT_41353 #define PO_DISABLE_GUARD_CHECK BIT_41432 #define RF_INV_E_COUNT BIT_4 /* Invalid entry count. */1450 #define SS_RESERVE_CONFLICT (BIT_4 | BIT_3)2511 #define DT_ISP2322 BIT_4
1615 (BIT_4 | BIT_3)) >> 3; in qla2x00_update_fw_options()1619 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; in qla2x00_update_fw_options()1637 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; in qla2x00_update_fw_options()2245 nv->add_firmware_options[1] = BIT_5 | BIT_4; in qla2x00_nvram_config()2252 nv->add_firmware_options[1] = BIT_5 | BIT_4; in qla2x00_nvram_config()2306 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); in qla2x00_nvram_config()2308 nv->firmware_options[1] &= ~BIT_4; in qla2x00_nvram_config()2314 nv->add_firmware_options[1] |= BIT_5 | BIT_4; in qla2x00_nvram_config()2332 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == in qla2x00_nvram_config()2333 (BIT_5 | BIT_4)) { in qla2x00_nvram_config()[all …]
642 options |= BIT_4; in qla25xx_create_req_que()739 options |= BIT_4; in qla25xx_create_rsp_que()
1284 if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0) in qla2x00_get_port_database()1307 if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0) in qla2x00_get_port_database()1313 fcport->supported_classes = (pd->options & BIT_4) ? in qla2x00_get_port_database()1675 if (iop[0] & BIT_4) { in qla24xx_login_fabric()2878 mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0); in qla2x00_set_idma_speed()3009 vpmod->options_idx1 = BIT_3|BIT_4|BIT_5; in qla24xx_modify_vp_config()
424 (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4; in qla24xx_pci_info_str()2230 if (ha->fw_attributes & BIT_4) { in qla2x00_probe_one()
1786 if (ha->fw_attributes & BIT_4) { in qla24xx_vport_create()
1220 if (iop[0] & BIT_4) { in qla24xx_logio_entry()
30 #define BIT_4 0x10 macro133 #define ISP_CFG0_1040B BIT_4 /* ISP1040B */137 #define ISP_CFG1_F64 BIT_4|BIT_5 /* 128-byte FIFO threshold */139 #define ISP_CFG1_F16 BIT_4 /* 128-byte FIFO threshold */
1808 err = qla1280_mailbox_command(ha, BIT_4 | BIT_3 | BIT_2 | in qla1280_load_firmware_dma()1825 err = qla1280_mailbox_command(ha, BIT_4 | BIT_3 | BIT_2 | in qla1280_load_firmware_dma()1947 if (!(status = qla1280_mailbox_command(ha, BIT_7 | BIT_6 | BIT_4 | in qla1280_init_rings()2230 cfg1 = RD_REG_WORD(®->cfg_1) & ~(BIT_4 | BIT_5 | BIT_6); in qla1280_nvram_config()2312 mb[1] |= BIT_4; in qla1280_nvram_config()2317 mb[2] |= BIT_4; in qla1280_nvram_config()
740 arg1 = id | (enable_mirroring ? BIT_4 : 0); in qlcnic_config_port_mirroring()970 arg1 |= (BIT_4 | BIT_6 | BIT_7); in qlcnic_config_switch_port()975 arg1 &= ~BIT_4; in qlcnic_config_switch_port()1035 esw_cfg->discard_tagged = !!(arg1 & BIT_4); in qlcnic_get_eswitch_port_config()
198 #define BIT_4 0x10 macro
1126 #define QLCNIC_SWITCH_PORT_MIRRORING BIT_4
69 #define BIT_4 0x10 macro185 #define SRB_GOT_SENSE BIT_4 /* sense data received. */