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Searched refs:BIT3 (Results 1 – 25 of 37) sorted by relevance

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/linux-2.6.39/drivers/scsi/
Dtmscsim.h188 #define BIT3 0x00000008 macro
197 #define UNIT_RETRY BIT3
209 #define SRB_MSGIN BIT3
226 #define UNDER_RUN BIT3
281 #define WIDE_NEGO_DONE BIT3 /* Not used ;-) */
336 #define SEND_START_ BIT3
343 #define ACTIVE_NEGATION BIT3
393 #define GROUP_CODE_VALID BIT3
402 #define SUCCESSFUL_OP BIT3
408 #define SYNC_OFFSET_FLAG BIT3
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Ddc395x.h72 #define BIT3 0x00000008 macro
81 #define UNIT_RETRY BIT3
131 #define UNDER_RUN BIT3
176 #define WIDE_NEGO_DONE BIT3
632 #define ACTIVE_NEGATION BIT3
/linux-2.6.39/drivers/staging/vt6655/
D80211hdr.h41 #define BIT3 0x00000008 macro
165 #define WLAN_GET_FC_FTYPE(n) ((((unsigned short)(n) >> 8) & (BIT2 | BIT3)) >> 2)
177 #define WLAN_GET_SEQ_FRGNUM(n) (((unsigned short)(n) >> 8) & (BIT0|BIT1|BIT2|BIT3))
178 #define WLAN_GET_SEQ_SEQNUM(n) ((((unsigned short)(n) >> 8) & (~(BIT0|BIT1|BIT2|BIT3))) >> 4)
185 #define WLAN_GET_CAP_INFO_CFPOLLREQ(n) ((((n) >> 8) & BIT3) >> 3)
200 #define WLAN_GET_FC_FTYPE(n) ((((unsigned short)(n)) & (BIT2 | BIT3)) >> 2)
213 #define WLAN_GET_SEQ_FRGNUM(n) (((unsigned short)(n)) & (BIT0|BIT1|BIT2|BIT3))
214 #define WLAN_GET_SEQ_SEQNUM(n) ((((unsigned short)(n)) & (~(BIT0|BIT1|BIT2|BIT3))) >> 4)
221 #define WLAN_GET_CAP_INFO_CFPOLLREQ(n) (((n) & BIT3) >> 3)
Dhostap.h39 #define WLAN_RATE_11M BIT3
Dbssdb.h58 #define WLAN_STA_TIM BIT3
/linux-2.6.39/drivers/staging/vt6656/
D80211hdr.h39 #define BIT3 0x00000008 macro
161 #define WLAN_GET_FC_FTYPE(n) ((((WORD)(n) >> 8) & (BIT2 | BIT3)) >> 2)
174 #define WLAN_GET_SEQ_FRGNUM(n) (((WORD)(n) >> 8) & (BIT0|BIT1|BIT2|BIT3))
176 & (~(BIT0|BIT1|BIT2|BIT3))) >> 4)
182 #define WLAN_GET_CAP_INFO_CFPOLLREQ(n) ((((n) >> 8) & BIT3) >> 3)
196 #define WLAN_GET_FC_FTYPE(n) ((((WORD)(n)) & (BIT2 | BIT3)) >> 2)
208 #define WLAN_GET_SEQ_FRGNUM(n) (((WORD)(n)) & (BIT0|BIT1|BIT2|BIT3))
209 #define WLAN_GET_SEQ_SEQNUM(n) ((((WORD)(n)) & (~(BIT0|BIT1|BIT2|BIT3))) >> 4)
215 #define WLAN_GET_CAP_INFO_CFPOLLREQ(n) (((n) & BIT3) >> 3)
Dhostap.h39 #define WLAN_RATE_11M BIT3
Dbssdb.h59 #define WLAN_STA_TIM BIT3
/linux-2.6.39/drivers/staging/rtl8192e/
Dr8192E_hw.h167 #define RCR_FILTER_MASK (BIT0|BIT1|BIT2|BIT3|BIT5|BIT12|BIT18|BIT19|BIT20|BIT21|BIT22|BIT23)
182 #define RCR_AB BIT3 // Accept broadcast packet
243 #define SCR_RxDecEnable BIT3 //Enable Rx Decryption
267 #define IMR_BEDOK BIT3 // AC_BE DMA OK Interrupt
276 #define TPPoll_VOQ BIT3 // VO queue polling
323 #define AcmHw_VoqEn BIT3
409 #define RRSR_11M BIT3
Dr8192E.h56 #define BIT3 0x00000008 macro
110 #define COMP_RECV BIT3 // Reveive part data path.
/linux-2.6.39/drivers/staging/rtl8192u/
Dr8192U_hw.h157 #define RCR_AB BIT3 // Accept broadcast packet
186 #define SCR_RxDecEnable BIT3 //Enable Rx Decryption
232 #define AcmHw_VoqEn BIT3
310 #define RRSR_11M BIT3
Dr8192U.h55 #define BIT3 0x00000008 macro
102 #define COMP_RECV BIT3 // Reveive part data path.
/linux-2.6.39/arch/arm/mach-integrator/include/mach/
Dbits.h29 #define BIT3 0x00000008 macro
/linux-2.6.39/drivers/staging/rtl8192u/ieee80211/
Drtl819x_Qos.h7 #define BIT3 0x00000008 macro
404 #define GET_BE_UAPSD(_apsd) ((_apsd) & BIT3)
405 #define SET_BE_UAPSD(_apsd) ((_apsd) |= BIT3)
/linux-2.6.39/drivers/staging/rtl8192e/ieee80211/
Drtl819x_Qos.h7 #define BIT3 0x00000008 macro
404 #define GET_BE_UAPSD(_apsd) ((_apsd) & BIT3)
405 #define SET_BE_UAPSD(_apsd) ((_apsd) |= BIT3)
/linux-2.6.39/drivers/video/via/
Ddvi.c504 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp0()
529 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp_low()
536 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp_low()
615 viafb_write_reg_mask(CRD2, VIACR, 0, BIT3); in viafb_dvi_enable()
Dlcd.c445 viafb_write_reg_mask(CRA2, VIACR, 0x08, BIT3); in load_lcd_scaling()
457 viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT3); in load_lcd_scaling()
548 BIT0 + BIT1 + BIT2 + BIT3); in lcd_patch_skew()
656 viafb_write_reg_mask(CR6A, VIACR, 0, BIT3); in integrated_lvds_disable()
704 viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3); in integrated_lvds_enable()
798 viafb_write_reg_mask(CR6B, VIACR, 0x00, BIT3); in viafb_lcd_enable()
799 viafb_write_reg_mask(CR6A, VIACR, 0x08, BIT3); in viafb_lcd_enable()
Dshare.h37 #define BIT3 0x08 macro
/linux-2.6.39/drivers/char/pcmcia/
Dsynclink_cs.c316 #define PVR_AUTOCTS BIT3
675 #define CMD_TXFIFO BIT3 // release current tx FIFO
1188 if (gis & (BIT3 + BIT2)) in mgslpc_isr()
3095 val |= BIT3; in hdlc_mode()
3104 val |= BIT4 + BIT3; in hdlc_mode()
3235 set_reg_bits(info, CHA + PVR, BIT3); in hdlc_mode()
3237 clear_reg_bits(info, CHA + PVR, BIT3); in hdlc_mode()
3272 clear_reg_bits(info, CHA + MODE, BIT3); in rx_stop()
3289 set_reg_bits(info, CHA + MODE, BIT3); in rx_start()
3505 val |= BIT3; in async_mode()
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/linux-2.6.39/drivers/staging/keucr/
Dsmilecc.c42 #define BIT3 0x08 macro
/linux-2.6.39/include/linux/
Dsynclink.h21 #define BIT3 0x0008 macro
/linux-2.6.39/drivers/tty/
Dsynclink.c497 #define TRANSMIT_STATUS BIT3
514 #define RXSTATUS_CRC_ERROR BIT3
515 #define RXSTATUS_FRAMING_ERROR BIT3
554 #define TXSTATUS_CRC_SENT BIT3
574 #define MISCSTATUS_RCC_UNDERRUN BIT3
600 #define SICR_RCC_UNDERFLOW BIT3
634 #define TXSTATUS_CRC_SENT BIT3
1460 usc_OutReg( info, RICR+LSBONLY, (u16)(usc_InReg(info, RICR+LSBONLY) & ~BIT3 )); in mgsl_isr_receive_data()
1618 if ( status & BIT3 ) { in mgsl_isr_receive_dma()
5056 usc_OutReg(info, SICR, (u16)(usc_InReg(info,SICR) | BIT3)); in usc_set_sdlc_mode()
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Dsynclinkmp.c427 #define CCTS BIT3
443 #define OVRN BIT3
1533 RegValue |= BIT3; in set_break()
1535 RegValue &= ~BIT3; in set_break()
2594 if (status & BIT3 << shift) in synclinkmp_interrupt()
2603 if (dmastatus & BIT3 << shift) in synclinkmp_interrupt()
4413 case 6: RegValue |= BIT5 + BIT3; break; in async_mode()
4414 case 5: RegValue |= BIT5 + BIT4 + BIT3 + BIT2; break; in async_mode()
4588 RegValue |= BIT3; in hdlc_mode()
4750 if (!(status & BIT3)) in get_signals()
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/linux-2.6.39/drivers/staging/rtl8187se/
Dr8180_hw.h27 #define BIT3 0x00000008 macro
Dr8185b_init.c289 u1bTmp &= ~BIT3; in HwHSSIThreeWire()
1634 TmpU1b = TmpU1b & ~BIT3; in rtl8185b_adapter_start()
1644 write_nic_byte(dev, PSR, (btPSR | BIT3)); in rtl8185b_adapter_start()

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