1 #ifndef B43_TABLES_NPHY_H_ 2 #define B43_TABLES_NPHY_H_ 3 4 #include <linux/types.h> 5 6 struct b43_phy_n_sfo_cfg { 7 u16 phy_bw1a; 8 u16 phy_bw2; 9 u16 phy_bw3; 10 u16 phy_bw4; 11 u16 phy_bw5; 12 u16 phy_bw6; 13 }; 14 15 struct b43_wldev; 16 17 struct nphy_txiqcal_ladder { 18 u8 percent; 19 u8 g_env; 20 }; 21 22 struct nphy_rf_control_override_rev2 { 23 u8 addr0; 24 u8 addr1; 25 u16 bmask; 26 u8 shift; 27 }; 28 29 struct nphy_rf_control_override_rev3 { 30 u16 val_mask; 31 u8 val_shift; 32 u8 en_addr0; 33 u8 val_addr0; 34 u8 en_addr1; 35 u8 val_addr1; 36 }; 37 38 struct nphy_gain_ctl_workaround_entry { 39 s8 lna1_gain[4]; 40 s8 lna2_gain[4]; 41 u8 gain_db[10]; 42 u8 gain_bits[10]; 43 44 u16 init_gain; 45 u16 rfseq_init[4]; 46 47 u16 cliphi_gain; 48 u16 clipmd_gain; 49 u16 cliplo_gain; 50 51 u16 crsmin; 52 u16 crsminl; 53 u16 crsminu; 54 55 u16 nbclip; 56 u16 wlclip; 57 }; 58 59 /* Get entry with workaround values for gain ctl. Does not return NULL. */ 60 struct nphy_gain_ctl_workaround_entry *b43_nphy_get_gain_ctl_workaround_ent( 61 struct b43_wldev *dev, bool ghz5, bool ext_lna); 62 63 /* Get the NPHY Channel Switch Table entry for a channel. 64 * Returns NULL on failure to find an entry. */ 65 const struct b43_nphy_channeltab_entry_rev2 * 66 b43_nphy_get_chantabent_rev2(struct b43_wldev *dev, u8 channel); 67 const struct b43_nphy_channeltab_entry_rev3 * 68 b43_nphy_get_chantabent_rev3(struct b43_wldev *dev, u16 freq); 69 70 71 /* The N-PHY tables. */ 72 73 #define B43_NTAB_TYPEMASK 0xF0000000 74 #define B43_NTAB_8BIT 0x10000000 75 #define B43_NTAB_16BIT 0x20000000 76 #define B43_NTAB_32BIT 0x30000000 77 #define B43_NTAB8(table, offset) (((table) << 10) | (offset) | B43_NTAB_8BIT) 78 #define B43_NTAB16(table, offset) (((table) << 10) | (offset) | B43_NTAB_16BIT) 79 #define B43_NTAB32(table, offset) (((table) << 10) | (offset) | B43_NTAB_32BIT) 80 81 /* Static N-PHY tables */ 82 #define B43_NTAB_FRAMESTRUCT B43_NTAB32(0x0A, 0x000) /* Frame Struct Table */ 83 #define B43_NTAB_FRAMESTRUCT_SIZE 832 84 #define B43_NTAB_FRAMELT B43_NTAB8 (0x18, 0x000) /* Frame Lookup Table */ 85 #define B43_NTAB_FRAMELT_SIZE 32 86 #define B43_NTAB_TMAP B43_NTAB32(0x0C, 0x000) /* T Map Table */ 87 #define B43_NTAB_TMAP_SIZE 448 88 #define B43_NTAB_TDTRN B43_NTAB32(0x0E, 0x000) /* TDTRN Table */ 89 #define B43_NTAB_TDTRN_SIZE 704 90 #define B43_NTAB_INTLEVEL B43_NTAB32(0x0D, 0x000) /* Int Level Table */ 91 #define B43_NTAB_INTLEVEL_SIZE 7 92 #define B43_NTAB_PILOT B43_NTAB16(0x0B, 0x000) /* Pilot Table */ 93 #define B43_NTAB_PILOT_SIZE 88 94 #define B43_NTAB_PILOTLT B43_NTAB32(0x14, 0x000) /* Pilot Lookup Table */ 95 #define B43_NTAB_PILOTLT_SIZE 6 96 #define B43_NTAB_TDI20A0 B43_NTAB32(0x13, 0x080) /* TDI Table 20 Antenna 0 */ 97 #define B43_NTAB_TDI20A0_SIZE 55 98 #define B43_NTAB_TDI20A1 B43_NTAB32(0x13, 0x100) /* TDI Table 20 Antenna 1 */ 99 #define B43_NTAB_TDI20A1_SIZE 55 100 #define B43_NTAB_TDI40A0 B43_NTAB32(0x13, 0x280) /* TDI Table 40 Antenna 0 */ 101 #define B43_NTAB_TDI40A0_SIZE 110 102 #define B43_NTAB_TDI40A1 B43_NTAB32(0x13, 0x300) /* TDI Table 40 Antenna 1 */ 103 #define B43_NTAB_TDI40A1_SIZE 110 104 #define B43_NTAB_BDI B43_NTAB16(0x15, 0x000) /* BDI Table */ 105 #define B43_NTAB_BDI_SIZE 6 106 #define B43_NTAB_CHANEST B43_NTAB32(0x16, 0x000) /* Channel Estimate Table */ 107 #define B43_NTAB_CHANEST_SIZE 96 108 #define B43_NTAB_MCS B43_NTAB8 (0x12, 0x000) /* MCS Table */ 109 #define B43_NTAB_MCS_SIZE 128 110 111 /* Volatile N-PHY tables */ 112 #define B43_NTAB_NOISEVAR10 B43_NTAB32(0x10, 0x000) /* Noise Var Table 10 */ 113 #define B43_NTAB_NOISEVAR10_SIZE 256 114 #define B43_NTAB_NOISEVAR11 B43_NTAB32(0x10, 0x080) /* Noise Var Table 11 */ 115 #define B43_NTAB_NOISEVAR11_SIZE 256 116 #define B43_NTAB_C0_ESTPLT B43_NTAB8 (0x1A, 0x000) /* Estimate Power Lookup Table Core 0 */ 117 #define B43_NTAB_C0_ESTPLT_SIZE 64 118 #define B43_NTAB_C1_ESTPLT B43_NTAB8 (0x1B, 0x000) /* Estimate Power Lookup Table Core 1 */ 119 #define B43_NTAB_C1_ESTPLT_SIZE 64 120 #define B43_NTAB_C0_ADJPLT B43_NTAB8 (0x1A, 0x040) /* Adjust Power Lookup Table Core 0 */ 121 #define B43_NTAB_C0_ADJPLT_SIZE 128 122 #define B43_NTAB_C1_ADJPLT B43_NTAB8 (0x1B, 0x040) /* Adjust Power Lookup Table Core 1 */ 123 #define B43_NTAB_C1_ADJPLT_SIZE 128 124 #define B43_NTAB_C0_GAINCTL B43_NTAB32(0x1A, 0x0C0) /* Gain Control Lookup Table Core 0 */ 125 #define B43_NTAB_C0_GAINCTL_SIZE 128 126 #define B43_NTAB_C1_GAINCTL B43_NTAB32(0x1B, 0x0C0) /* Gain Control Lookup Table Core 1 */ 127 #define B43_NTAB_C1_GAINCTL_SIZE 128 128 #define B43_NTAB_C0_IQLT B43_NTAB32(0x1A, 0x140) /* IQ Lookup Table Core 0 */ 129 #define B43_NTAB_C0_IQLT_SIZE 128 130 #define B43_NTAB_C1_IQLT B43_NTAB32(0x1B, 0x140) /* IQ Lookup Table Core 1 */ 131 #define B43_NTAB_C1_IQLT_SIZE 128 132 #define B43_NTAB_C0_LOFEEDTH B43_NTAB16(0x1A, 0x1C0) /* Local Oscillator Feed Through Lookup Table Core 0 */ 133 #define B43_NTAB_C0_LOFEEDTH_SIZE 128 134 #define B43_NTAB_C1_LOFEEDTH B43_NTAB16(0x1B, 0x1C0) /* Local Oscillator Feed Through Lookup Table Core 1 */ 135 #define B43_NTAB_C1_LOFEEDTH_SIZE 128 136 137 /* Static N-PHY tables, PHY revision >= 3 */ 138 #define B43_NTAB_FRAMESTRUCT_R3 B43_NTAB32(10, 000) /* frame struct */ 139 #define B43_NTAB_PILOT_R3 B43_NTAB16(11, 000) /* pilot */ 140 #define B43_NTAB_TMAP_R3 B43_NTAB32(12, 000) /* TM AP */ 141 #define B43_NTAB_INTLEVEL_R3 B43_NTAB32(13, 000) /* INT LV */ 142 #define B43_NTAB_TDTRN_R3 B43_NTAB32(14, 000) /* TD TRN */ 143 #define B43_NTAB_NOISEVAR0_R3 B43_NTAB32(16, 000) /* noise variance 0 */ 144 #define B43_NTAB_NOISEVAR1_R3 B43_NTAB32(16, 128) /* noise variance 1 */ 145 #define B43_NTAB_MCS_R3 B43_NTAB16(18, 000) /* MCS */ 146 #define B43_NTAB_TDI20A0_R3 B43_NTAB32(19, 128) /* TDI 20/0 */ 147 #define B43_NTAB_TDI20A1_R3 B43_NTAB32(19, 256) /* TDI 20/1 */ 148 #define B43_NTAB_TDI40A0_R3 B43_NTAB32(19, 640) /* TDI 40/0 */ 149 #define B43_NTAB_TDI40A1_R3 B43_NTAB32(19, 768) /* TDI 40/1 */ 150 #define B43_NTAB_PILOTLT_R3 B43_NTAB32(20, 000) /* PLT lookup */ 151 #define B43_NTAB_CHANEST_R3 B43_NTAB32(22, 000) /* channel estimate */ 152 #define B43_NTAB_FRAMELT_R3 B43_NTAB8 (24, 000) /* frame lookup */ 153 #define B43_NTAB_C0_ESTPLT_R3 B43_NTAB8 (26, 000) /* estimated power lookup 0 */ 154 #define B43_NTAB_C1_ESTPLT_R3 B43_NTAB8 (27, 000) /* estimated power lookup 1 */ 155 #define B43_NTAB_C0_ADJPLT_R3 B43_NTAB8 (26, 064) /* adjusted power lookup 0 */ 156 #define B43_NTAB_C1_ADJPLT_R3 B43_NTAB8 (27, 064) /* adjusted power lookup 1 */ 157 #define B43_NTAB_C0_GAINCTL_R3 B43_NTAB32(26, 192) /* gain control lookup 0 */ 158 #define B43_NTAB_C1_GAINCTL_R3 B43_NTAB32(27, 192) /* gain control lookup 1 */ 159 #define B43_NTAB_C0_IQLT_R3 B43_NTAB32(26, 320) /* I/Q lookup 0 */ 160 #define B43_NTAB_C1_IQLT_R3 B43_NTAB32(27, 320) /* I/Q lookup 1 */ 161 #define B43_NTAB_C0_LOFEEDTH_R3 B43_NTAB16(26, 448) /* Local Oscillator Feed Through lookup 0 */ 162 #define B43_NTAB_C1_LOFEEDTH_R3 B43_NTAB16(27, 448) /* Local Oscillator Feed Through lookup 1 */ 163 164 #define B43_NTAB_TX_IQLO_CAL_LOFT_LADDER_40_SIZE 18 165 #define B43_NTAB_TX_IQLO_CAL_LOFT_LADDER_20_SIZE 18 166 #define B43_NTAB_TX_IQLO_CAL_IQIMB_LADDER_40_SIZE 18 167 #define B43_NTAB_TX_IQLO_CAL_IQIMB_LADDER_20_SIZE 18 168 #define B43_NTAB_TX_IQLO_CAL_STARTCOEFS_REV3 11 169 #define B43_NTAB_TX_IQLO_CAL_STARTCOEFS 9 170 #define B43_NTAB_TX_IQLO_CAL_CMDS_RECAL_REV3 12 171 #define B43_NTAB_TX_IQLO_CAL_CMDS_RECAL 10 172 #define B43_NTAB_TX_IQLO_CAL_CMDS_FULLCAL 10 173 #define B43_NTAB_TX_IQLO_CAL_CMDS_FULLCAL_REV3 12 174 175 u32 b43_ntab_read(struct b43_wldev *dev, u32 offset); 176 void b43_ntab_read_bulk(struct b43_wldev *dev, u32 offset, 177 unsigned int nr_elements, void *_data); 178 void b43_ntab_write(struct b43_wldev *dev, u32 offset, u32 value); 179 void b43_ntab_write_bulk(struct b43_wldev *dev, u32 offset, 180 unsigned int nr_elements, const void *_data); 181 182 void b43_nphy_rev0_1_2_tables_init(struct b43_wldev *dev); 183 void b43_nphy_rev3plus_tables_init(struct b43_wldev *dev); 184 185 extern const u32 b43_ntab_tx_gain_rev0_1_2[]; 186 extern const u32 b43_ntab_tx_gain_rev3plus_2ghz[]; 187 extern const u32 b43_ntab_tx_gain_rev3_5ghz[]; 188 extern const u32 b43_ntab_tx_gain_rev4_5ghz[]; 189 extern const u32 b43_ntab_tx_gain_rev5plus_5ghz[]; 190 191 extern const u32 txpwrctrl_tx_gain_ipa[]; 192 extern const u32 txpwrctrl_tx_gain_ipa_rev5[]; 193 extern const u32 txpwrctrl_tx_gain_ipa_rev6[]; 194 extern const u32 txpwrctrl_tx_gain_ipa_5g[]; 195 extern const u16 tbl_iqcal_gainparams[2][9][8]; 196 extern const struct nphy_txiqcal_ladder ladder_lo[]; 197 extern const struct nphy_txiqcal_ladder ladder_iq[]; 198 extern const u16 loscale[]; 199 200 extern const u16 tbl_tx_iqlo_cal_loft_ladder_40[]; 201 extern const u16 tbl_tx_iqlo_cal_loft_ladder_20[]; 202 extern const u16 tbl_tx_iqlo_cal_iqimb_ladder_40[]; 203 extern const u16 tbl_tx_iqlo_cal_iqimb_ladder_20[]; 204 extern const u16 tbl_tx_iqlo_cal_startcoefs_nphyrev3[]; 205 extern const u16 tbl_tx_iqlo_cal_startcoefs[]; 206 extern const u16 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[]; 207 extern const u16 tbl_tx_iqlo_cal_cmds_recal[]; 208 extern const u16 tbl_tx_iqlo_cal_cmds_fullcal[]; 209 extern const u16 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[]; 210 extern const s16 tbl_tx_filter_coef_rev4[7][15]; 211 212 extern const struct nphy_rf_control_override_rev2 213 tbl_rf_control_override_rev2[]; 214 extern const struct nphy_rf_control_override_rev3 215 tbl_rf_control_override_rev3[]; 216 217 #endif /* B43_TABLES_NPHY_H_ */ 218