Searched refs:ASYNC_BANK3_SIZE (Results 1 – 14 of 14) sorted by relevance
17 #define ASYNC_BANK3_SIZE 0x00100000 /* 1M */ macro
17 #define ASYNC_BANK3_SIZE 0x04000000 /* 64M */ macro
136 dcplb_bounds[i_d].eaddr = ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE; in generate_cplb_tables_all()175 icplb_bounds[i_i].eaddr = ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE; in generate_cplb_tables_all()
122 if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) { in dcplb_miss()219 if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) { in icplb_miss()
375 if (addr >= ASYNC_BANK3_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) { in in_async()378 if (addr + size <= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) in in_async()
440 ASYNC_BANK2_SIZE + ASYNC_BANK3_SIZE)
88 } else if (address >= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE && address < BOOT_ROM_START) { in decode_address()
648 page_mask_nelts = (((_ramend + ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE - in memory_setup()
125 if (unlikely(addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE)) in protect_page()