Searched refs:AR_ANT_DIV_ENABLE (Results 1 – 2 of 2) sorted by relevance
267 #define AR_ANT_DIV_ENABLE 0x1000000 macro
3523 REG_RMW_FIELD(ah, AR_PHY_MC_GAIN_CTRL, AR_ANT_DIV_ENABLE, in ar9003_hw_ant_ctrl_apply()